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| author | Ingo Molnar <mingo@elte.hu> | 2009-06-11 23:31:52 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-06-11 23:31:52 +0200 |
| commit | 0d5959723e1db3fd7323c198a50c16cecf96c7a9 (patch) | |
| tree | 802b623fff261ebcbbddadf84af5524398364a18 /arch/sh/mm/cache-sh5.c | |
| parent | 62fdac5913f71f8f200bd2c9bd59a02e9a1498e9 (diff) | |
| parent | 512626a04e72aca60effe111fa0333ed0b195d21 (diff) | |
| download | kernel-crypto-0d5959723e1db3fd7323c198a50c16cecf96c7a9.tar.gz kernel-crypto-0d5959723e1db3fd7323c198a50c16cecf96c7a9.tar.xz kernel-crypto-0d5959723e1db3fd7323c198a50c16cecf96c7a9.zip | |
Merge branch 'linus' into x86/mce3
Conflicts:
arch/x86/kernel/cpu/mcheck/mce_64.c
arch/x86/kernel/irq.c
Merge reason: Resolve the conflicts above.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/sh/mm/cache-sh5.c')
| -rw-r--r-- | arch/sh/mm/cache-sh5.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/sh/mm/cache-sh5.c b/arch/sh/mm/cache-sh5.c index 9e277ec7d53..86762092508 100644 --- a/arch/sh/mm/cache-sh5.c +++ b/arch/sh/mm/cache-sh5.c @@ -60,7 +60,7 @@ static inline void sh64_teardown_dtlb_cache_slot(void) static inline void sh64_icache_inv_all(void) { unsigned long long addr, flag, data; - unsigned int flags; + unsigned long flags; addr = ICCR0; flag = ICCR0_ICI; @@ -172,7 +172,7 @@ static void sh64_icache_inv_user_page_range(struct mm_struct *mm, unsigned long eaddr; unsigned long after_last_page_start; unsigned long mm_asid, current_asid; - unsigned long long flags = 0ULL; + unsigned long flags = 0; mm_asid = cpu_asid(smp_processor_id(), mm); current_asid = get_asid(); @@ -236,7 +236,7 @@ static void sh64_icache_inv_user_small_range(struct mm_struct *mm, unsigned long long eaddr = start; unsigned long long eaddr_end = start + len; unsigned long current_asid, mm_asid; - unsigned long long flags; + unsigned long flags; unsigned long long epage_start; /* @@ -342,7 +342,7 @@ static void inline sh64_dcache_purge_sets(int sets_to_purge_base, int n_sets) * alloco is a NOP if the cache is write-through. */ if (test_bit(SH_CACHE_MODE_WT, &(cpu_data->dcache.flags))) - ctrl_inb(eaddr); + __raw_readb((unsigned long)eaddr); } } |