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| author | Paul Mackerras <paulus@samba.org> | 2005-09-10 21:13:13 +1000 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-10 10:15:11 -0700 |
| commit | 31139971b3dc9fbb2e8a8572fb81e6e8470f363a (patch) | |
| tree | 644fc6833fe6e18d00dbc8b6b281f77e7b923d35 /arch/ppc/kernel/head.S | |
| parent | bb0bb3b6596cdb08adb0b72453cc67d48e139c2c (diff) | |
| download | kernel-crypto-31139971b3dc9fbb2e8a8572fb81e6e8470f363a.tar.gz kernel-crypto-31139971b3dc9fbb2e8a8572fb81e6e8470f363a.tar.xz kernel-crypto-31139971b3dc9fbb2e8a8572fb81e6e8470f363a.zip | |
[PATCH] ppc32: support hotplug cpu on powermacs
This allows cpus to be off-lined on 32-bit SMP powermacs. When a cpu
is off-lined, it is put into sleep mode with interrupts disabled. It
can be on-lined again by asserting its soft-reset pin, which is
connected to a GPIO pin.
With this I can off-line the second cpu in my dual G4 powermac, which
means that I can then suspend the machine (the suspend/resume code
refuses to suspend if more than one cpu is online, and making it cope
with multiple cpus is surprisingly messy).
Signed-off-by: Paul Mackerras <paulus@samba.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'arch/ppc/kernel/head.S')
| -rw-r--r-- | arch/ppc/kernel/head.S | 28 |
1 files changed, 13 insertions, 15 deletions
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S index 55daf1210f3..1960fb8c259 100644 --- a/arch/ppc/kernel/head.S +++ b/arch/ppc/kernel/head.S @@ -1023,23 +1023,21 @@ __secondary_start_gemini: andc r4,r4,r3 mtspr SPRN_HID0,r4 sync - bl gemini_prom_init b __secondary_start #endif /* CONFIG_GEMINI */ - .globl __secondary_start_psurge -__secondary_start_psurge: - li r24,1 /* cpu # */ - b __secondary_start_psurge99 - .globl __secondary_start_psurge2 -__secondary_start_psurge2: - li r24,2 /* cpu # */ - b __secondary_start_psurge99 - .globl __secondary_start_psurge3 -__secondary_start_psurge3: - li r24,3 /* cpu # */ - b __secondary_start_psurge99 -__secondary_start_psurge99: - /* we come in here with IR=0 and DR=1, and DBAT 0 + + .globl __secondary_start_pmac_0 +__secondary_start_pmac_0: + /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */ + li r24,0 + b 1f + li r24,1 + b 1f + li r24,2 + b 1f + li r24,3 +1: + /* on powersurge, we come in here with IR=0 and DR=1, and DBAT 0 set to map the 0xf0000000 - 0xffffffff region */ mfmsr r0 rlwinm r0,r0,0,28,26 /* clear DR (0x10) */ |