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authorIngo Molnar <mingo@elte.hu>2008-10-12 12:39:30 +0200
committerIngo Molnar <mingo@elte.hu>2008-10-12 12:39:50 +0200
commit4c7145a1ec1bb789d5f07e47510e8bda546a7c4a (patch)
treee2767b77e5413473a3bba302237f4669a203f183 /arch/powerpc/include/asm/dcr-regs.h
parent74e91604b2452c15bbe72d77b37cf47ed0310d13 (diff)
parentfd048088306656824958e7783ffcee27e241b361 (diff)
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Merge branch 'linus' into x86/spinlocks
Done to prevent this failure of an Octopus merge: Added arch/arm/include/asm/byteorder.h in both, but differently. ERROR: Merge conflict in arch/arm/include/asm/byteorder.h Auto-merging include/asm-x86/spinlock.h ERROR: Merge conflict in include/asm-x86/spinlock.h fatal: merge program failed
Diffstat (limited to 'arch/powerpc/include/asm/dcr-regs.h')
-rw-r--r--arch/powerpc/include/asm/dcr-regs.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/powerpc/include/asm/dcr-regs.h b/arch/powerpc/include/asm/dcr-regs.h
index 29b0ecef980..f15296cf359 100644
--- a/arch/powerpc/include/asm/dcr-regs.h
+++ b/arch/powerpc/include/asm/dcr-regs.h
@@ -68,6 +68,10 @@
#define SDR0_UART3 0x0123
#define SDR0_CUST0 0x4000
+/* SDRs (460EX/460GT) */
+#define SDR0_ETH_CFG 0x4103
+#define SDR0_ETH_CFG_ECS 0x00000100 /* EMAC int clk source */
+
/*
* All those DCR register addresses are offsets from the base address
* for the SRAM0 controller (e.g. 0x20 on 440GX). The base address is