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author | James Hsiao <jhsiao@amcc.com> | 2009-02-05 16:18:13 +1100 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2009-02-18 16:49:43 +0800 |
commit | 049359d655277c382683a6030ae0bac485568ffc (patch) | |
tree | 36d2c702b4b289ca949e439620f2801158b21fd4 /arch/powerpc/boot | |
parent | 5b07bd57016fb1033c678746f90bfc3c12d3e494 (diff) | |
download | kernel-crypto-049359d655277c382683a6030ae0bac485568ffc.tar.gz kernel-crypto-049359d655277c382683a6030ae0bac485568ffc.tar.xz kernel-crypto-049359d655277c382683a6030ae0bac485568ffc.zip |
crypto: amcc - Add crypt4xx driver
This patch adds support for AMCC ppc4xx security device driver. This is the
initial release that includes the driver framework with AES and SHA1 algorithms
support.
The remaining algorithms will be released in the near future.
Signed-off-by: James Hsiao <jhsiao@amcc.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/powerpc/boot')
-rw-r--r-- | arch/powerpc/boot/dts/canyonlands.dts | 7 | ||||
-rw-r--r-- | arch/powerpc/boot/dts/kilauea.dts | 7 |
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts index 8b5ba8261a3..4447def69dc 100644 --- a/arch/powerpc/boot/dts/canyonlands.dts +++ b/arch/powerpc/boot/dts/canyonlands.dts @@ -127,6 +127,13 @@ dcr-reg = <0x010 0x002>; }; + CRYPTO: crypto@180000 { + compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto"; + reg = <4 0x00180000 0x80400>; + interrupt-parent = <&UIC0>; + interrupts = <0x1d 0x4>; + }; + MAL0: mcmal { compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; dcr-reg = <0x180 0x062>; diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts index 2804444812e..5e6b08ff6f6 100644 --- a/arch/powerpc/boot/dts/kilauea.dts +++ b/arch/powerpc/boot/dts/kilauea.dts @@ -97,6 +97,13 @@ 0x6 0x4>; /* ECC SEC Error */ }; + CRYPTO: crypto@ef700000 { + compatible = "amcc,ppc405ex-crypto", "amcc,ppc4xx-crypto"; + reg = <0xef700000 0x80400>; + interrupt-parent = <&UIC0>; + interrupts = <0x17 0x2>; + }; + MAL0: mcmal { compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; dcr-reg = <0x180 0x062>; |