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| author | Thiemo Seufer <ths@networkno.de> | 2006-06-18 05:23:47 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-06-19 17:39:24 +0100 |
| commit | 4fb60a4b80f9db94605c2a47807d34dfb9ae44c8 (patch) | |
| tree | 07f454d04edd7a02b8e6d8a8c7ec04b6b0d1aec6 /arch/mips/sibyte | |
| parent | b75d4c1d686aff4f8f9ea96b2e8908a3454a3ff3 (diff) | |
| download | kernel-crypto-4fb60a4b80f9db94605c2a47807d34dfb9ae44c8.tar.gz kernel-crypto-4fb60a4b80f9db94605c2a47807d34dfb9ae44c8.tar.xz kernel-crypto-4fb60a4b80f9db94605c2a47807d34dfb9ae44c8.zip | |
[MIPS] Random fixes for sb1250
Random improvements for sb1250: Silence compiler warnings, a bugfix for
the profiling code, and a comment typo.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/sibyte')
| -rw-r--r-- | arch/mips/sibyte/sb1250/irq.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/mips/sibyte/sb1250/irq.c b/arch/mips/sibyte/sb1250/irq.c index 0f6e54db488..f853c32f60a 100644 --- a/arch/mips/sibyte/sb1250/irq.c +++ b/arch/mips/sibyte/sb1250/irq.c @@ -435,13 +435,17 @@ static inline int dclz(unsigned long long x) return lz; } +extern void sb1250_timer_interrupt(struct pt_regs *regs); +extern void sb1250_mailbox_interrupt(struct pt_regs *regs); +extern void sb1250_kgdb_interrupt(struct pt_regs *regs); + asmlinkage void plat_irq_dispatch(struct pt_regs *regs) { unsigned int pending; #ifdef CONFIG_SIBYTE_SB1250_PROF /* Set compare to count to silence count/compare timer interrupts */ - write_c0_count(read_c0_count()); + write_c0_compare(read_c0_count()); #endif /* @@ -482,7 +486,7 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs) * Default...we've hit an IP[2] interrupt, which means we've * got to check the 1250 interrupt registers to figure out what * to do. Need to detect which CPU we're on, now that - ~ smp_affinity is supported. + * smp_affinity is supported. */ mask = __raw_readq(IOADDR(A_IMR_REGISTER(smp_processor_id(), R_IMR_INTERRUPT_STATUS_BASE))); |