[MIPS] Complete fixes after removal of pt_regs argument to int handlers.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

7 files changed, 50 insertions, 50 deletions

diff --git a/arch/mips/momentum/jaguar_atx/irq.c b/arch/mips/momentum/jaguar_atx/irq.c
index f9067469a65..2efb25aa1ae 100644
--- a/arch/mips/momentum/jaguar_atx/irq.c
+++ b/arch/mips/momentum/jaguar_atx/irq.c
@@ -40,33 +40,33 @@
 #include <asm/mipsregs.h>
 #include <asm/time.h>
 
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
 {
 	unsigned int pending = read_c0_cause() & read_c0_status();
 
 	if (pending & STATUSF_IP0)
-		do_IRQ(0, regs);
+		do_IRQ(0);
 	else if (pending & STATUSF_IP1)
-		do_IRQ(1, regs);
+		do_IRQ(1);
 	else if (pending & STATUSF_IP2)
-		do_IRQ(2, regs);
+		do_IRQ(2);
 	else if (pending & STATUSF_IP3)
-		do_IRQ(3, regs);
+		do_IRQ(3);
 	else if (pending & STATUSF_IP4)
-		do_IRQ(4, regs);
+		do_IRQ(4);
 	else if (pending & STATUSF_IP5)
-		do_IRQ(5, regs);
+		do_IRQ(5);
 	else if (pending & STATUSF_IP6)
-		do_IRQ(6, regs);
+		do_IRQ(6);
 	else if (pending & STATUSF_IP7)
-		ll_timer_interrupt(7, regs);
+		ll_timer_interrupt(7);
 	else {
 		/*
 		 * Now look at the extended interrupts
 		 */
 		pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
 		if (pending & STATUSF_IP8)
-			ll_mv64340_irq(regs);
+			ll_mv64340_irq();
 	}
 }
 
diff --git a/arch/mips/momentum/ocelot_3/irq.c b/arch/mips/momentum/ocelot_3/irq.c
index 793782a9c19..cea0e5deb80 100644
--- a/arch/mips/momentum/ocelot_3/irq.c
+++ b/arch/mips/momentum/ocelot_3/irq.c
@@ -75,26 +75,26 @@ void __init arch_init_irq(void)
 
 }
 
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
 {
 	unsigned int pending = read_c0_cause() & read_c0_status();
 
 	if (pending & STATUSF_IP0)
-		do_IRQ(0, regs);
+		do_IRQ(0);
 	else if (pending & STATUSF_IP1)
-		do_IRQ(1, regs);
+		do_IRQ(1);
 	else if (pending & STATUSF_IP2)
-		do_IRQ(2, regs);
+		do_IRQ(2);
 	else if (pending & STATUSF_IP3)
-		do_IRQ(3, regs);
+		do_IRQ(3);
 	else if (pending & STATUSF_IP4)
-		do_IRQ(4, regs);
+		do_IRQ(4);
 	else if (pending & STATUSF_IP5)
-		do_IRQ(5, regs);
+		do_IRQ(5);
 	else if (pending & STATUSF_IP6)
-		do_IRQ(6, regs);
+		do_IRQ(6);
 	else if (pending & STATUSF_IP7)
-		do_IRQ(7, regs);
+		do_IRQ(7);
 	else {
 		/*
 		 * Now look at the extended interrupts
@@ -102,8 +102,8 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
 		pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
 
 		if (pending & STATUSF_IP8)
-			ll_mv64340_irq(regs);
+			ll_mv64340_irq();
 		else
-			spurious_interrupt(regs);
+			spurious_interrupt();
 	}
 }
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c
index a5dc230520d..2fb14bb08e6 100644
--- a/arch/mips/momentum/ocelot_c/cpci-irq.c
+++ b/arch/mips/momentum/ocelot_c/cpci-irq.c
@@ -112,7 +112,7 @@ static void end_cpci_irq(unsigned int irq)
  * Interrupt handler for interrupts coming from the FPGA chip.
  * It could be built in ethernet ports etc...
  */
-void ll_cpci_irq(struct pt_regs *regs)
+void ll_cpci_irq(void)
 {
 	unsigned int irq_src, irq_mask;
 
@@ -123,7 +123,7 @@ void ll_cpci_irq(struct pt_regs *regs)
 	/* mask for just the interrupts we want */
 	irq_src &= ~irq_mask;
 
-	do_IRQ(ls1bit8(irq_src) + CPCI_IRQ_BASE, regs);
+	do_IRQ(ls1bit8(irq_src) + CPCI_IRQ_BASE);
 }
 
 #define shutdown_cpci_irq	disable_cpci_irq
diff --git a/arch/mips/momentum/ocelot_c/irq.c b/arch/mips/momentum/ocelot_c/irq.c
index 9d44ae1e156..4be7b26e30e 100644
--- a/arch/mips/momentum/ocelot_c/irq.c
+++ b/arch/mips/momentum/ocelot_c/irq.c
@@ -59,31 +59,31 @@ static struct irqaction cascade_mv64340 = {
 	no_action, IRQF_DISABLED, CPU_MASK_NONE, "cascade via MV64340", NULL, NULL
 };
 
-extern void ll_uart_irq(struct pt_regs *regs);
-extern void ll_cpci_irq(struct pt_regs *regs);
+extern void ll_uart_irq(void);
+extern void ll_cpci_irq(void);
 
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
 {
 	unsigned int pending = read_c0_cause() & read_c0_status();
 
 	if (pending & STATUSF_IP0)
-		do_IRQ(0, regs);
+		do_IRQ(0);
 	else if (pending & STATUSF_IP1)
-		do_IRQ(1, regs);
+		do_IRQ(1);
 	else if (pending & STATUSF_IP2)
-		do_IRQ(2, regs);
+		do_IRQ(2);
 	else if (pending & STATUSF_IP3)
-		ll_uart_irq(regs);
+		ll_uart_irq();
 	else if (pending & STATUSF_IP4)
-		do_IRQ(4, regs);
+		do_IRQ(4);
 	else if (pending & STATUSF_IP5)
-		ll_cpci_irq(regs);
+		ll_cpci_irq();
 	else if (pending & STATUSF_IP6)
 		ll_mv64340_irq(regs);
 	else if (pending & STATUSF_IP7)
-		do_IRQ(7, regs);
+		do_IRQ(7);
 	else
-		spurious_interrupt(regs);
+		spurious_interrupt();
 }
 
 void __init arch_init_irq(void)
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c
index 9f33d8f1d82..f8efe2370ff 100644
--- a/arch/mips/momentum/ocelot_c/uart-irq.c
+++ b/arch/mips/momentum/ocelot_c/uart-irq.c
@@ -105,7 +105,7 @@ static void end_uart_irq(unsigned int irq)
 /*
  * Interrupt handler for interrupts coming from the FPGA chip.
  */
-void ll_uart_irq(struct pt_regs *regs)
+void ll_uart_irq(void)
 {
 	unsigned int irq_src, irq_mask;
 
@@ -116,7 +116,7 @@ void ll_uart_irq(struct pt_regs *regs)
 	/* mask for just the interrupts we want */
 	irq_src &= ~irq_mask;
 
-	do_IRQ(ls1bit8(irq_src) + 74, regs);
+	do_IRQ(ls1bit8(irq_src) + 74);
 }
 
 #define shutdown_uart_irq	disable_uart_irq
diff --git a/arch/mips/momentum/ocelot_g/gt-irq.c b/arch/mips/momentum/ocelot_g/gt-irq.c
index 6cd87cf0195..b8cffa80548 100644
--- a/arch/mips/momentum/ocelot_g/gt-irq.c
+++ b/arch/mips/momentum/ocelot_g/gt-irq.c
@@ -108,7 +108,7 @@ int disable_galileo_irq(int int_cause, int bit_num)
  * we keep this particular structure in the function.
  */
 
-static irqreturn_t gt64240_p0int_irq(int irq, void *dev, struct pt_regs *regs)
+static irqreturn_t gt64240_p0int_irq(int irq, void *dev)
 {
 	uint32_t irq_src, irq_src_mask;
 	int handled;
@@ -135,7 +135,7 @@ static irqreturn_t gt64240_p0int_irq(int irq, void *dev, struct pt_regs *regs)
 		/* handle the timer call */
 		do_timer(1);
 #ifndef CONFIG_SMP
-		update_process_times(user_mode(regs));
+		update_process_times(user_mode(get_irq_regs()));
 #endif
 	}
 
diff --git a/arch/mips/momentum/ocelot_g/irq.c b/arch/mips/momentum/ocelot_g/irq.c
index 7a4a419804f..da46524e87c 100644
--- a/arch/mips/momentum/ocelot_g/irq.c
+++ b/arch/mips/momentum/ocelot_g/irq.c
@@ -48,22 +48,22 @@
 #include <asm/mipsregs.h>
 #include <asm/system.h>
 
-asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
+asmlinkage void plat_irq_dispatch(void)
 {
 	unsigned int pending = read_c0_cause() & read_c0_status();
 
 	if (pending & STATUSF_IP2)
-		do_IRQ(2, regs);
+		do_IRQ(2);
 	else if (pending & STATUSF_IP3)
-		do_IRQ(3, regs);
+		do_IRQ(3);
 	else if (pending & STATUSF_IP4)
-		do_IRQ(4, regs);
+		do_IRQ(4);
 	else if (pending & STATUSF_IP5)
-		do_IRQ(5, regs);
+		do_IRQ(5);
 	else if (pending & STATUSF_IP6)
-		do_IRQ(6, regs);
+		do_IRQ(6);
 	else if (pending & STATUSF_IP7)
-		do_IRQ(7, regs);
+		do_IRQ(7);
 	else {
 		/*
 		 * Now look at the extended interrupts
@@ -71,15 +71,15 @@ asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
 		pending = (read_c0_cause() & (read_c0_intcontrol() << 8)) >> 16;
 
 		if (pending & STATUSF_IP8)
-			do_IRQ(8, regs);
+			do_IRQ(8);
 		else if (pending & STATUSF_IP9)
-			do_IRQ(9, regs);
+			do_IRQ(9);
 		else if (pending & STATUSF_IP10)
-			do_IRQ(10, regs);
+			do_IRQ(10);
 		else if (pending & STATUSF_IP11)
-			do_IRQ(11, regs);
+			do_IRQ(11);
 		else
-			spurious_interrupt(regs);
+			spurious_interrupt();
 	}
 }