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author | Ingo Molnar <mingo@elte.hu> | 2008-10-12 12:39:30 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-10-12 12:39:50 +0200 |
commit | 4c7145a1ec1bb789d5f07e47510e8bda546a7c4a (patch) | |
tree | e2767b77e5413473a3bba302237f4669a203f183 /arch/mips/include/asm/mach-ip32/war.h | |
parent | 74e91604b2452c15bbe72d77b37cf47ed0310d13 (diff) | |
parent | fd048088306656824958e7783ffcee27e241b361 (diff) | |
download | kernel-crypto-4c7145a1ec1bb789d5f07e47510e8bda546a7c4a.tar.gz kernel-crypto-4c7145a1ec1bb789d5f07e47510e8bda546a7c4a.tar.xz kernel-crypto-4c7145a1ec1bb789d5f07e47510e8bda546a7c4a.zip |
Merge branch 'linus' into x86/spinlocks
Done to prevent this failure of an Octopus merge:
Added arch/arm/include/asm/byteorder.h in both, but differently.
ERROR: Merge conflict in arch/arm/include/asm/byteorder.h
Auto-merging include/asm-x86/spinlock.h
ERROR: Merge conflict in include/asm-x86/spinlock.h
fatal: merge program failed
Diffstat (limited to 'arch/mips/include/asm/mach-ip32/war.h')
-rw-r--r-- | arch/mips/include/asm/mach-ip32/war.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-ip32/war.h b/arch/mips/include/asm/mach-ip32/war.h new file mode 100644 index 00000000000..d194056dcd7 --- /dev/null +++ b/arch/mips/include/asm/mach-ip32/war.h @@ -0,0 +1,25 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * + * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> + */ +#ifndef __ASM_MIPS_MACH_IP32_WAR_H +#define __ASM_MIPS_MACH_IP32_WAR_H + +#define R4600_V1_INDEX_ICACHEOP_WAR 0 +#define R4600_V1_HIT_CACHEOP_WAR 0 +#define R4600_V2_HIT_CACHEOP_WAR 0 +#define R5432_CP0_INTERRUPT_WAR 0 +#define BCM1250_M3_WAR 0 +#define SIBYTE_1956_WAR 0 +#define MIPS4K_ICACHE_REFILL_WAR 0 +#define MIPS_CACHE_SYNC_WAR 0 +#define TX49XX_ICACHE_INDEX_INV_WAR 0 +#define RM9000_CDEX_SMP_WAR 0 +#define ICACHE_REFILLS_WORKAROUND_WAR 1 +#define R10000_LLSC_WAR 0 +#define MIPS34K_MISSED_ITLB_WAR 0 + +#endif /* __ASM_MIPS_MACH_IP32_WAR_H */ |