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authorJesper Nilsson <jesper.nilsson@axis.com>2008-01-25 17:55:31 +0100
committerJesper Nilsson <jesper.nilsson@axis.com>2008-02-08 11:06:35 +0100
commitea402db97f8f9e2cfe646faf1c9d473d9f9044d1 (patch)
treeb190ffb00e44054d95ecbdba2ff4b661b04b7cc0 /arch/cris
parent41f9412b206985a36145b423f58bf8b46085358e (diff)
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CRIS v32: Move hw_settings.S to machine specific directories for ETRAX FS and ARTPEC-3
Diffstat (limited to 'arch/cris')
-rw-r--r--arch/cris/arch-v32/lib/hw_settings.S72
1 files changed, 0 insertions, 72 deletions
diff --git a/arch/cris/arch-v32/lib/hw_settings.S b/arch/cris/arch-v32/lib/hw_settings.S
deleted file mode 100644
index fff9443513d..00000000000
--- a/arch/cris/arch-v32/lib/hw_settings.S
+++ /dev/null
@@ -1,72 +0,0 @@
-/*
- * $Id: hw_settings.S,v 1.3 2005/04/24 18:36:57 starvik Exp $
- *
- * This table is used by some tools to extract hardware parameters.
- * The table should be included in the kernel and the decompressor.
- * Don't forget to update the tools if you change this table.
- *
- * Copyright (C) 2001 Axis Communications AB
- *
- * Authors: Mikael Starvik (starvik@axis.com)
- */
-
-#include <asm/arch/hwregs/asm/reg_map_asm.h>
-#include <asm/arch/hwregs/asm/bif_core_defs_asm.h>
-#include <asm/arch/hwregs/asm/gio_defs_asm.h>
-
- .ascii "HW_PARAM_MAGIC" ; Magic number
- .dword 0xc0004000 ; Kernel start address
-
- ; Debug port
-#ifdef CONFIG_ETRAX_DEBUG_PORT0
- .dword 0
-#elif defined(CONFIG_ETRAX_DEBUG_PORT1)
- .dword 1
-#elif defined(CONFIG_ETRAX_DEBUG_PORT2)
- .dword 2
-#elif defined(CONFIG_ETRAX_DEBUG_PORT3)
- .dword 3
-#else
- .dword 4 ; No debug
-#endif
-
- ; Register values
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp1_cfg)
- .dword CONFIG_ETRAX_MEM_GRP1_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp2_cfg)
- .dword CONFIG_ETRAX_MEM_GRP2_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp3_cfg)
- .dword CONFIG_ETRAX_MEM_GRP3_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_grp4_cfg)
- .dword CONFIG_ETRAX_MEM_GRP4_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0)
- .dword CONFIG_ETRAX_SDRAM_GRP0_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1)
- .dword CONFIG_ETRAX_SDRAM_GRP1_CONFIG
- .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_timing)
- .dword CONFIG_ETRAX_SDRAM_TIMING
- .dword REG_ADDR(bif_core, regi_bif_core, rw_sdram_cmd)
- .dword CONFIG_ETRAX_SDRAM_COMMAND
-
- .dword REG_ADDR(gio, regi_gio, rw_pa_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PA_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pa_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PA_OE
- .dword REG_ADDR(gio, regi_gio, rw_pb_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PB_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pb_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PB_OE
- .dword REG_ADDR(gio, regi_gio, rw_pc_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PC_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pc_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PC_OE
- .dword REG_ADDR(gio, regi_gio, rw_pd_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PD_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pd_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PD_OE
- .dword REG_ADDR(gio, regi_gio, rw_pe_dout)
- .dword CONFIG_ETRAX_DEF_GIO_PE_OUT
- .dword REG_ADDR(gio, regi_gio, rw_pe_oe)
- .dword CONFIG_ETRAX_DEF_GIO_PE_OE
-
- .dword 0 ; No more register values