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| author | Ingo Molnar <mingo@elte.hu> | 2009-06-01 21:06:21 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-06-01 21:06:21 +0200 |
| commit | 3d58f48ba05caed9118bce62b3047f8683438835 (patch) | |
| tree | 94c911034f0e14ded73d3e9e6e9f8e22b6cad822 /arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h | |
| parent | abfe0af9813153bae8c85d9bac966bafcb8ddab1 (diff) | |
| parent | d9244b5d2fbfe9fa540024b410047af13ceec90f (diff) | |
| download | kernel-crypto-3d58f48ba05caed9118bce62b3047f8683438835.tar.gz kernel-crypto-3d58f48ba05caed9118bce62b3047f8683438835.tar.xz kernel-crypto-3d58f48ba05caed9118bce62b3047f8683438835.zip | |
Merge branch 'linus' into irq/numa
Conflicts:
arch/mips/sibyte/bcm1480/irq.c
arch/mips/sibyte/sb1250/irq.c
Merge reason: we gathered a few conflicts plus update to latest upstream fixes.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h')
| -rw-r--r-- | arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h | 20 |
1 files changed, 10 insertions, 10 deletions
diff --git a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h index 81549516572..2ba1767512d 100644 --- a/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h +++ b/arch/arm/plat-s3c64xx/include/plat/gpio-bank-h.h @@ -61,14 +61,14 @@ #define S3C64XX_GPH7_ADDR_CF1 (0x06 << 28) #define S3C64XX_GPH7_EINT_G6_7 (0x07 << 28) -#define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 32) -#define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 32) -#define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 32) -#define S3C64XX_GPH8_ADDR_CF2 (0x06 << 32) -#define S3C64XX_GPH8_EINT_G6_8 (0x07 << 32) - -#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 36) -#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 36) -#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 36) -#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 36) +#define S3C64XX_GPH8_MMC1_DATA6 (0x02 << 0) +#define S3C64XX_GPH8_MMC2_DATA2 (0x03 << 0) +#define S3C64XX_GPH8_I2S_V40_LRCLK (0x05 << 0) +#define S3C64XX_GPH8_ADDR_CF2 (0x06 << 0) +#define S3C64XX_GPH8_EINT_G6_8 (0x07 << 0) +#define S3C64XX_GPH9_OUTPUT (0x01 << 4) +#define S3C64XX_GPH9_MMC1_DATA7 (0x02 << 4) +#define S3C64XX_GPH9_MMC2_DATA3 (0x03 << 4) +#define S3C64XX_GPH9_I2S_V40_DI (0x05 << 4) +#define S3C64XX_GPH9_EINT_G6_9 (0x07 << 4) |