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authorDavid S. Miller <davem@davemloft.net>2010-01-04 15:33:22 -0800
committerDavid S. Miller <davem@davemloft.net>2010-01-04 15:33:22 -0800
commit5958eed76ccc8c361f872829bdc4b8c6dc9cd379 (patch)
tree8f8dfcced082db674b0ae3ca3af9fdb6dde59dae /arch/arm/mm/proc-xsc3.S
parentc7c17c2779075e675cb3c7fe2ecde67e226771fb (diff)
parentc5974b835a909ff15c3b7e6cf6789b5eb919f419 (diff)
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Merge branch 'master' of /home/davem/src/GIT/linux-2.6/
Diffstat (limited to 'arch/arm/mm/proc-xsc3.S')
-rw-r--r--arch/arm/mm/proc-xsc3.S11
1 files changed, 6 insertions, 5 deletions
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S
index fab134e2982..96456f54879 100644
--- a/arch/arm/mm/proc-xsc3.S
+++ b/arch/arm/mm/proc-xsc3.S
@@ -226,15 +226,16 @@ ENTRY(xsc3_coherent_user_range)
mov pc, lr
/*
- * flush_kern_dcache_page(void *page)
+ * flush_kern_dcache_area(void *addr, size_t size)
*
* Ensure no D cache aliasing occurs, either with itself or
* the I cache.
*
- * - addr - page aligned address
+ * - addr - kernel address
+ * - size - region size
*/
-ENTRY(xsc3_flush_kern_dcache_page)
- add r1, r0, #PAGE_SZ
+ENTRY(xsc3_flush_kern_dcache_area)
+ add r1, r0, r1
1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line
add r0, r0, #CACHELINESIZE
cmp r0, r1
@@ -309,7 +310,7 @@ ENTRY(xsc3_cache_fns)
.long xsc3_flush_user_cache_range
.long xsc3_coherent_kern_range
.long xsc3_coherent_user_range
- .long xsc3_flush_kern_dcache_page
+ .long xsc3_flush_kern_dcache_area
.long xsc3_dma_inv_range
.long xsc3_dma_clean_range
.long xsc3_dma_flush_range