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| author | Ronen Shitrit <rshitrit@marvell.com> | 2008-09-23 15:28:10 +0300 |
|---|---|---|
| committer | Nicolas Pitre <nico@cam.org> | 2008-09-25 16:29:21 -0400 |
| commit | 4360bb41920ffacd4a935fa692768129ee5bef4e (patch) | |
| tree | 8d5bbe15ad4c39d089ac42ab0330d8c515584f65 /arch/arm/mm/Kconfig | |
| parent | 3d014b01e54ce08d15a598f0bfb3ce597f14ca03 (diff) | |
| download | kernel-crypto-4360bb41920ffacd4a935fa692768129ee5bef4e.tar.gz kernel-crypto-4360bb41920ffacd4a935fa692768129ee5bef4e.tar.xz kernel-crypto-4360bb41920ffacd4a935fa692768129ee5bef4e.zip | |
[ARM] Kirkwood: add support for L2 cache WB/WT selection
Feroceon L2 cache can work in eighther write through or write back mode
on Kirkwood. Add the option to configure this mode according to Kconfig.
Signed-off-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mm/Kconfig')
| -rw-r--r-- | arch/arm/mm/Kconfig | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig index ed15f876c72..330814d1ee2 100644 --- a/arch/arm/mm/Kconfig +++ b/arch/arm/mm/Kconfig @@ -735,6 +735,14 @@ config CACHE_FEROCEON_L2 help This option enables the Feroceon L2 cache controller. +config CACHE_FEROCEON_L2_WRITETHROUGH + bool "Force Feroceon L2 cache write through" + depends on CACHE_FEROCEON_L2 + default n + help + Say Y here to use the Feroceon L2 cache in writethrough mode. + Unless you specifically require this, say N for writeback mode. + config CACHE_L2X0 bool "Enable the L2x0 outer cache controller" depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 |