summaryrefslogtreecommitdiffstats
path: root/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
diff options
context:
space:
mode:
authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-06-15 10:36:54 +1000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2009-06-15 10:36:54 +1000
commit7dafd239ab522d38979ebe44d79aa68ad7b1a383 (patch)
tree04754a0c6495e57c1fe5f417fbfc99272d353c0e /arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
parentbc47ab0241c7c86da4f5e5f82fbca7d45387c18d (diff)
parent45e3e1935e2857c54783291107d33323b3ef33c8 (diff)
downloadkernel-crypto-7dafd239ab522d38979ebe44d79aa68ad7b1a383.tar.gz
kernel-crypto-7dafd239ab522d38979ebe44d79aa68ad7b1a383.tar.xz
kernel-crypto-7dafd239ab522d38979ebe44d79aa68ad7b1a383.zip
Merge commit 'origin/master' into next
Diffstat (limited to 'arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h')
-rw-r--r--arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h54
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
new file mode 100644
index 00000000000..3751d293cb1
--- /dev/null
+++ b/arch/arm/mach-omap2/sdram-qimonda-hyb18m512160af-6.h
@@ -0,0 +1,54 @@
+/*
+ * SDRC register values for the Qimonda HYB18M512160AF-6
+ *
+ * Copyright (C) 2008-2009 Texas Instruments, Inc.
+ * Copyright (C) 2008-2009 Nokia Corporation
+ *
+ * Paul Walmsley
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
+#define ARCH_ARM_MACH_OMAP2_SDRAM_QIMONDA_HYB18M512160AF6
+
+#include <mach/sdrc.h>
+
+/* Qimonda HYB18M512160AF-6 */
+static struct omap_sdrc_params hyb18m512160af6_sdrc_params[] = {
+ [0] = {
+ .rate = 166000000,
+ .actim_ctrla = 0x629db4c6,
+ .actim_ctrlb = 0x00012214,
+ .rfr_ctrl = 0x0004dc01,
+ .mr = 0x00000032,
+ },
+ [1] = {
+ .rate = 165941176,
+ .actim_ctrla = 0x629db4c6,
+ .actim_ctrlb = 0x00012214,
+ .rfr_ctrl = 0x0004dc01,
+ .mr = 0x00000032,
+ },
+ [2] = {
+ .rate = 83000000,
+ .actim_ctrla = 0x31512283,
+ .actim_ctrlb = 0x0001220a,
+ .rfr_ctrl = 0x00025501,
+ .mr = 0x00000022,
+ },
+ [3] = {
+ .rate = 82970588,
+ .actim_ctrla = 0x31512283,
+ .actim_ctrlb = 0x0001220a,
+ .rfr_ctrl = 0x00025501,
+ .mr = 0x00000022,
+ },
+ [4] = {
+ .rate = 0
+ },
+};
+
+#endif