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| author | Lennert Buytenhek <buytenh@wantstofly.org> | 2006-12-18 01:01:08 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2006-12-18 00:14:56 +0000 |
| commit | 6d2e857d02a59332b7cd89aeac8b5962a357ac7a (patch) | |
| tree | 09e1a3435dc87326785e5382c550ccbfe1a2a47c | |
| parent | 99e4a6dda9dc4b863773c0a5857b762474b817cf (diff) | |
| download | kernel-crypto-6d2e857d02a59332b7cd89aeac8b5962a357ac7a.tar.gz kernel-crypto-6d2e857d02a59332b7cd89aeac8b5962a357ac7a.tar.xz kernel-crypto-6d2e857d02a59332b7cd89aeac8b5962a357ac7a.zip | |
[ARM] 4055/1: iop13xx: fix phys_io/io_pg_offst for iq81340mc/sc
The phys_io/io_pg_offst machine record variables were being set
to bogus values, causing problems when enabling DEBUG_LL.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/mach-iop13xx/iq81340mc.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-iop13xx/iq81340sc.c | 6 | ||||
| -rw-r--r-- | include/asm-arm/arch-iop13xx/iq81340.h | 5 |
3 files changed, 7 insertions, 10 deletions
diff --git a/arch/arm/mach-iop13xx/iq81340mc.c b/arch/arm/mach-iop13xx/iq81340mc.c index ee595786cd2..2a1bbfe9896 100644 --- a/arch/arm/mach-iop13xx/iq81340mc.c +++ b/arch/arm/mach-iop13xx/iq81340mc.c @@ -88,11 +88,11 @@ static struct sys_timer iq81340mc_timer = { MACHINE_START(IQ81340MC, "Intel IQ81340MC") /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ - .phys_io = PHYS_IO, - .io_pg_offst = IO_PG_OFFSET, + .phys_io = IOP13XX_PMMR_PHYS_MEM_BASE, + .io_pg_offst = (IOP13XX_PMMR_VIRT_MEM_BASE >> 18) & 0xfffc, + .boot_params = 0x00000100, .map_io = iop13xx_map_io, .init_irq = iop13xx_init_irq, .timer = &iq81340mc_timer, - .boot_params = BOOT_PARAM_OFFSET, .init_machine = iq81340mc_init, MACHINE_END diff --git a/arch/arm/mach-iop13xx/iq81340sc.c b/arch/arm/mach-iop13xx/iq81340sc.c index 6677e14b61b..5ad2b62c9bf 100644 --- a/arch/arm/mach-iop13xx/iq81340sc.c +++ b/arch/arm/mach-iop13xx/iq81340sc.c @@ -90,11 +90,11 @@ static struct sys_timer iq81340sc_timer = { MACHINE_START(IQ81340SC, "Intel IQ81340SC") /* Maintainer: Dan Williams <dan.j.williams@intel.com> */ - .phys_io = PHYS_IO, - .io_pg_offst = IO_PG_OFFSET, + .phys_io = IOP13XX_PMMR_PHYS_MEM_BASE, + .io_pg_offst = (IOP13XX_PMMR_VIRT_MEM_BASE >> 18) & 0xfffc, + .boot_params = 0x00000100, .map_io = iop13xx_map_io, .init_irq = iop13xx_init_irq, .timer = &iq81340sc_timer, - .boot_params = BOOT_PARAM_OFFSET, .init_machine = iq81340sc_init, MACHINE_END diff --git a/include/asm-arm/arch-iop13xx/iq81340.h b/include/asm-arm/arch-iop13xx/iq81340.h index b98f8f109c2..ba2cf931e9c 100644 --- a/include/asm-arm/arch-iop13xx/iq81340.h +++ b/include/asm-arm/arch-iop13xx/iq81340.h @@ -24,8 +24,5 @@ #define PBI_CF_IDE_BASE (IQ81340_CMP_FLSH) #define PBI_CF_BAR_ADDR (IOP13XX_PBI_BAR1) -/* These are the values used in the Machine description */ -#define PHYS_IO 0xfeffff00 -#define IO_PG_OFFSET 0xffffff00 -#define BOOT_PARAM_OFFSET 0x00000100 + #endif /* _IQ81340_H_ */ |