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authorIgor Gnatenko <i.gnatenko.brain@gmail.com>2014-08-27 10:06:02 +0600
committerIgor Gnatenko <i.gnatenko.brain@gmail.com>2014-08-27 10:06:02 +0600
commit151792169745161fea8fac01869c8fdd6da3db70 (patch)
tree5b1fde410d3f70000e448446cd8e8af9949f68c3 /sources
parent21f1a7fe9c861f76c1d4fd27c488629dcf4d24d2 (diff)
downloadmesa-151792169745161fea8fac01869c8fdd6da3db70.tar.gz
mesa-151792169745161fea8fac01869c8fdd6da3db70.tar.xz
mesa-151792169745161fea8fac01869c8fdd6da3db70.zip
80771e47b6c1e47ab55f17311e1d4e227a9eb3d8 commit
$ git log c2867f5b3626157379ef0d4d5bcaf5180ca0ec1f..80771e47b6c1e47ab55f17311e1d4e227a9eb3d8 --format="- %H: %s (%an)" - 80771e47b6c1e47ab55f17311e1d4e227a9eb3d8: radeon/uvd: fix field handling on R6XX style UVD (Christian König) - 03a99ba9e41ea86355a4febbe0b1a114d5455b9f: vl/compositor: set the scissor before clearing the render target (Christian König) - b73c20759fe1b4a96296bed58637f5ded7c9155c: st/vdpau: fix vlVdpOutputSurfaceRender(Output|Bitmap)Surface (Christian König) - e3c251071b0c9396c3ec76d1cf943c60ae297281: ilo: use genhw command opcodes (Chia-I Wu) - 6c73478223a0ed76e54f14c46831974c3efaacdf: ilo: rename intel_bo_map_unsynchronized() (Chia-I Wu) - 354d84b6297fe2937e9684175ea9d3b650b75417: ilo: remove max_batch_size (Chia-I Wu) - fbb869c1aaf6aa5400028556e23bbbb1ba41ce42: ilo: replace domains by reloc flags (Chia-I Wu) - 01887593a424824426eda75ff90b5e2a49876e86: docs: Update who is working on tessellation (Chris Forbes) - 38a3490368f6f365890de11a5f2d983b40fbd243: glsl: Remove bogus "OUPTUT" token (Chris Forbes) - 83503f9e68c5b2162682ed5b8691484a6d67aaea: radeonsi: handle PIPE_BIND_BLENDABLE (Marek Olšák) - 770719eb821f96688c7efa12dc42805590f984ef: r600g: only set PIPE_BIND_BLENDABLE if colorbuffer rendering is supported (Marek Olšák) - bc0ae40616a89e748c165aa2963c712f7640fb0a: r300g: handle PIPE_BIND_BLENDABLE (Marek Olšák) - 7317f1185932e2188206069a938c598f9cd18c60: vc4: Stop doing qpu_inst(add, NOP) or qpu_inst(NOP, mul). (Eric Anholt) - 78d144f7de8cad42dfe588a667e105543f6b2e4b: vc4: Set the other WADDR in the qpu instruction helpers. (Eric Anholt) - 54499a85fff415e5c627a44d27a3592b6633bd4b: vc4: Merge qpu_a_NOP() and qpu_m_NOP to a single qpu_NOP() helper. (Eric Anholt) - 1a7035f386c4402b07e7a2073daf914f95bd0a02: vc4: Ignore WADDRs from the other half of the instruction when merging. (Eric Anholt) - 3212bafc28ca3991a89e0554d1867eaa5fde6a0b: vc4: Fix LT/GE set-0-or-1 compares. (Eric Anholt) - e2f66315cbf234779b195b6f7390ea9b11b288ad: u_vbuf: Add a few more format fallbacks. (Eric Anholt) - bbbe3b65adee44c164532d7afb4ff8fd8f88bbf4: u_vbuf: Simplify the format fallback translation. (Eric Anholt) - 306e421887720b149be77c749108bcffcebe34f6: freedreno/a2xx: fix segfault (Rob Clark) - bd3b0964675d36e753e273d5667b922cc9baac4a: freedreno/a3xx: handle first/last level properly (Rob Clark) - b40a6c2b17de1f63d70d62608737ed9a259da1c5: freedreno: implement pipe_flush_resource() (Rob Clark) - 478a08ebd2b29724f2d440e560ab331c534236cd: freedreno: don't ignore src/dst level (Rob Clark) - 8d8a5eb792c662a8def7c9ab65d2df67972cf659: vc4: Fix save/restore of the VS/FS in the blitter. (Eric Anholt) - 9542e682078a1b2e65f6b62a8db58f25cff18078: vc4: Clear padding of ioctl arguments. (Eric Anholt) Signed-off-by: Igor Gnatenko <i.gnatenko.brain@gmail.com>
Diffstat (limited to 'sources')
-rw-r--r--sources2
1 files changed, 1 insertions, 1 deletions
diff --git a/sources b/sources
index 0fd00b6..3edc59e 100644
--- a/sources
+++ b/sources
@@ -1 +1 @@
-47debe611a8154fc008719ef7549b9f5 mesa-c2867f5b3626157379ef0d4d5bcaf5180ca0ec1f.tar.xz
+9ddd4db9edd879bac31ebdc98da0693a mesa-80771e47b6c1e47ab55f17311e1d4e227a9eb3d8.tar.xz