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| author | Nicolas Chauvet <kwizart@gmail.com> | 2014-12-19 22:40:21 +0100 |
|---|---|---|
| committer | Nicolas Chauvet <kwizart@gmail.com> | 2015-01-31 09:28:00 +0100 |
| commit | 56e869d8a0bd36df907935c3e6503a46f3d2085b (patch) | |
| tree | f643057bb1ea95b831d5911ca5ad1539e02867cf /arm-tegra20-fix_gr3d_dts.patch | |
| parent | 10b710995f334ed5411f501518f8ed72570db70c (diff) | |
| download | kernel-f21-3.18-tegra.tar.gz kernel-f21-3.18-tegra.tar.xz kernel-f21-3.18-tegra.zip | |
Fix gr3d addr for tegra20f21-3.18-tegra
Diffstat (limited to 'arm-tegra20-fix_gr3d_dts.patch')
| -rw-r--r-- | arm-tegra20-fix_gr3d_dts.patch | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arm-tegra20-fix_gr3d_dts.patch b/arm-tegra20-fix_gr3d_dts.patch new file mode 100644 index 00000000..b77740b3 --- /dev/null +++ b/arm-tegra20-fix_gr3d_dts.patch @@ -0,0 +1,44 @@ +Subject: [PATCH] ARM: dts: tegra20: fix GR3D, DSI unit and reg base addresses + +Commit 58ecb23f64ee ("ARM: tegra: add missing unit addresses to DT") added +unit address and changed reg base for GR3D and DSI host1x modules, but these +addresses belongs to GR2D and TVO modules respectively. Fix it by changing +modules unit and reg base addresses to proper ones. + +Signed-off-by: Dmitry Osipenko <digetx@gmail.com> +Fixes: 58ecb23f64ee (ARM: tegra: add missing unit addresses to DT) +Cc: <stable@vger.kernel.org> # v3.13+ +--- + arch/arm/boot/dts/tegra20.dtsi | 8 ++++---- + 1 file changed, 4 insertions(+), 4 deletions(-) + +diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi +index 8acf5d8..f76fe94 100644 +--- a/arch/arm/boot/dts/tegra20.dtsi ++++ b/arch/arm/boot/dts/tegra20.dtsi +@@ -68,9 +68,9 @@ + reset-names = "2d"; + }; + +- gr3d@54140000 { ++ gr3d@54180000 { + compatible = "nvidia,tegra20-gr3d"; +- reg = <0x54140000 0x00040000>; ++ reg = <0x54180000 0x00040000>; + clocks = <&tegra_car TEGRA20_CLK_GR3D>; + resets = <&tegra_car 24>; + reset-names = "3d"; +@@ -130,9 +130,9 @@ + status = "disabled"; + }; + +- dsi@542c0000 { ++ dsi@54300000 { + compatible = "nvidia,tegra20-dsi"; +- reg = <0x542c0000 0x00040000>; ++ reg = <0x54300000 0x00040000>; + clocks = <&tegra_car TEGRA20_CLK_DSI>; + resets = <&tegra_car 48>; + reset-names = "dsi"; +-- +2.2.0 |