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authorNicolas Chauvet <kwizart@gmail.com>2014-06-24 15:25:19 +0200
committerNicolas Chauvet <kwizart@gmail.com>2014-07-07 16:21:19 +0200
commit338f03e12fe730ad50871e47388bb92809ea48d0 (patch)
treed608eacc065d12593e06ddfc9c66747b323c75ab
parent886fb97677cdc0b089d83ecc37f13c892daa531e (diff)
downloadkernel-338f03e12fe730ad50871e47388bb92809ea48d0.tar.gz
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Add tegra-bp-delay-timer-3.17.patch
-rw-r--r--tegra-bp-delay-timer-3.17.patch59
1 files changed, 59 insertions, 0 deletions
diff --git a/tegra-bp-delay-timer-3.17.patch b/tegra-bp-delay-timer-3.17.patch
new file mode 100644
index 00000000..5cb20aef
--- /dev/null
+++ b/tegra-bp-delay-timer-3.17.patch
@@ -0,0 +1,59 @@
+From 0ff36b4f479ec8e0cd9b7a919ab877f2d553cd30 Mon Sep 17 00:00:00 2001
+From: Peter De Schrijver <pdeschrijver@nvidia.com>
+Date: Thu, 12 Jun 2014 18:58:29 +0300
+Subject: clocksource: tegra: Use us counter as delay timer
+
+All Tegra SoCs have a freerunning microsecond counter which can be used as a
+delay timer.
+
+Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
+Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
+Signed-off-by: Stephen Warren <swarren@nvidia.com>
+
+diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
+index d1869f0..d2616ef 100644
+--- a/drivers/clocksource/tegra20_timer.c
++++ b/drivers/clocksource/tegra20_timer.c
+@@ -27,6 +27,7 @@
+ #include <linux/of_address.h>
+ #include <linux/of_irq.h>
+ #include <linux/sched_clock.h>
++#include <linux/delay.h>
+
+ #include <asm/mach/time.h>
+ #include <asm/smp_twd.h>
+@@ -53,6 +54,8 @@ static void __iomem *rtc_base;
+ static struct timespec persistent_ts;
+ static u64 persistent_ms, last_persistent_ms;
+
++static struct delay_timer tegra_delay_timer;
++
+ #define timer_writel(value, reg) \
+ __raw_writel(value, timer_reg_base + (reg))
+ #define timer_readl(reg) \
+@@ -139,6 +142,11 @@ static void tegra_read_persistent_clock(struct timespec *ts)
+ *ts = *tsp;
+ }
+
++static unsigned long tegra_delay_timer_read_counter_long(void)
++{
++ return readl(timer_reg_base + TIMERUS_CNTR_1US);
++}
++
+ static irqreturn_t tegra_timer_interrupt(int irq, void *dev_id)
+ {
+ struct clock_event_device *evt = (struct clock_event_device *)dev_id;
+@@ -206,6 +214,11 @@ static void __init tegra20_init_timer(struct device_node *np)
+ BUG();
+ }
+
++ tegra_delay_timer.read_current_timer =
++ tegra_delay_timer_read_counter_long;
++ tegra_delay_timer.freq = 1000000;
++ register_current_timer_delay(&tegra_delay_timer);
++
+ ret = setup_irq(tegra_timer_irq.irq, &tegra_timer_irq);
+ if (ret) {
+ pr_err("Failed to register timer IRQ: %d\n", ret);
+--
+cgit v0.10.1