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Diffstat (limited to 'lib/pathname.rb')

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/* * (C) Copyright 2001 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this * project. * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as * published by the Free Software Foundation; either version 2 of * the License, or (at your option) any later version. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ /* * configuration options, board specific, for Siemens Card Controller Module */ #ifndef __CONFIG_H #define __CONFIG_H #undef CCM_80MHz /* define for 80 MHz CPU only */ /* * High Level Configuration Options * (easy to change) */ #define CONFIG_MPC860 1 /* This is a MPC860 CPU ... */ #define CONFIG_CCM 1 /* on a Card Controller Module */ #define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */ #undef CONFIG_8xx_CONS_SMC2 #undef CONFIG_8xx_CONS_NONE /* ENVIRONMENT */ #define CONFIG_BAUDRATE 19200 /* console baudrate in bps */ #define CONFIG_BOOTDELAY 2 /* autoboot after 2 seconds */ #define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */ #define CONFIG_IPADDR 192.168.0.42 #define CONFIG_NETMASK 255.255.255.0 #define CONFIG_GATEWAYIP 0.0.0.0 #define CONFIG_SERVERIP 192.168.0.254 #define CONFIG_HOSTNAME CCM #define CONFIG_LOADADDR 40180000 #undef CONFIG_BOOTARGS #define CONFIG_BOOTCOMMAND "setenv bootargs " \ "mem=$(mem) " \ "root=/dev/ram rw ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off " \ "wt_8xx=timeout:3600; " \ "bootm" #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ #define CONFIG_WATCHDOG 1 /* watchdog enabled */ #undef CONFIG_STATUS_LED /* Status LED disabled */ #define CONFIG_PRAM 512 /* reserve 512kB "protected RAM"*/ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_SPI /* enable SPI driver */ #define CONFIG_SPI_X /* 16 bit EEPROM addressing */ /* ---------------------------------------------------------------- * Offset to initial SPI buffers in DPRAM (used if the environment * is in the SPI EEPROM): We need a 520 byte scratch DPRAM area to * use at an early stage. It is used between the two initialization * calls (spi_init_f() and spi_init_r()). The value 0xB00 makes it * far enough from the start of the data area (as well as from the * stack pointer). * ---------------------------------------------------------------- */ #define CFG_SPI_INIT_OFFSET 0xB00 #define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 32-byte page size */ #define CONFIG_MAC_PARTITION /* nod used yet */ #define CONFIG_DOS_PARTITION #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ CFG_CMD_DHCP | \ CFG_CMD_DATE | \ CFG_CMD_EEPROM | \ CFG_CMD_BSP ) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> /*----------------------------------------------------------------------*/ /* * Miscellaneous configurable options */ #define CFG_LONGHELP /* undef to save memory */ #define CFG_PROMPT "=> " /* Monitor Command Prompt */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */ #else #define CFG_CBSIZE 256 /* Console I/O Buffer Size */ #endif #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */ #define CFG_MAXARGS 16 /* max number of command args */ #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */ #define CFG_MEMTEST_START 0x00100000 /* memtest works on */ #define CFG_MEMTEST_END 0x00F00000 /* 1 ... 15MB in DRAM */ #define CFG_LOAD_ADDR 0x00100000 /* default load address */ /* Ethernet hardware configuration done using port pins */ #define CFG_PA_ETH_RESET 0x0200 /* PA 6 */ #define CFG_PA_ETH_MDDIS 0x4000 /* PA 1 */ #define CFG_PB_ETH_POWERDOWN 0x00000800 /* PB 20 */ #define CFG_PB_ETH_CFG1 0x00000400 /* PB 21 */ #define CFG_PB_ETH_CFG2 0x00000200 /* PB 22 */ #define CFG_PB_ETH_CFG3 0x00000100 /* PB 23 */ /* Ethernet settings: * MDIO not disabled, autonegotiation, 10/100Mbps, half/full duplex */ #define CFG_ETH_MDDIS_VALUE 0 #define CFG_ETH_CFG1_VALUE 1 #define CFG_ETH_CFG2_VALUE 1 #define CFG_ETH_CFG3_VALUE 1 /* PUMA configuration */ #define CFG_PC_PUMA_PROG 0x0200 /* PC 6 */ #define CFG_PC_PUMA_DONE 0x0008 /* PC 12 */ #define CFG_PC_PUMA_INIT 0x0004 /* PC 13 */ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* * Low Level Configuration Settings * (address mappings, register initial values, etc.) * You should know what you are doing if you make changes here. */ /*----------------------------------------------------------------------- * Internal Memory Mapped Register */ #define CFG_IMMR 0xF0000000 /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in DPRAM) */ #define CFG_INIT_RAM_ADDR CFG_IMMR #define CFG_INIT_RAM_END 0x2F00 /* End of used area in DPRAM */ #define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */ #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET /*----------------------------------------------------------------------- * Address accessed to reset the board - must not be mapped/assigned */ #define CFG_RESET_ADDRESS 0xFEFFFFFF /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) * Please note that CFG_SDRAM_BASE _must_ start at 0 */ #define CFG_SDRAM_BASE 0x00000000 #define CFG_FLASH_BASE 0x40000000 #if defined(DEBUG) #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #else #define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */ #endif #define CFG_MONITOR_BASE CFG_FLASH_BASE #define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */ /* * For booting Linux, the board info and command line data * have to be in the first 8 MB of memory, since this is * the maximum mapped by the Linux kernel during initialization. */ #define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ /*----------------------------------------------------------------------- * FLASH organization */ #define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */ #define CFG_MAX_FLASH_SECT 67 /* max number of sectors on one chip */ #define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */ #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ #if 1 /* Start port with environment in flash; switch to SPI EEPROM later */ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_OFFSET 0x8000 /* Offset of Environment Sector */ #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ /* Address and size of Redundant Environment Sector */ #define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE) #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE) #else /* Final version: environment in EEPROM */ #define CFG_ENV_IS_IN_EEPROM 1 #define CFG_ENV_OFFSET 2048 #define CFG_ENV_SIZE 2048 #endif /*----------------------------------------------------------------------- * Hardware Information Block */ #define CFG_HWINFO_OFFSET 0x0003FFC0 /* offset of HW Info block */ #define CFG_HWINFO_SIZE 0x00000040 /* size of HW Info block */ #define CFG_HWINFO_MAGIC 0x54514D38 /* 'TQM8' */ /*----------------------------------------------------------------------- * Cache Configuration */ #define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */ #define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */ /*-----------------------------------------------------------------------


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