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author	nobu <nobu@b2dd03c8-39d4-4d8f-98ff-823fe69b080e>	2009-03-01 10:11:00 +0000
committer	nobu <nobu@b2dd03c8-39d4-4d8f-98ff-823fe69b080e>	2009-03-01 10:11:00 +0000
commit	b1cb3a834a9ba0f5c89501ad9cfbd4834914917f (patch)
tree	ec48241551b781da707dad885e98f72abcf2e7b7 /missing/crypt.c
parent	b6c0822f8ccb14850fed072a59851263474ce598 (diff)

* common.mk (.y.c): removed extra backslash. [ruby-core:22602]

git-svn-id: http://svn.ruby-lang.org/repos/ruby/trunk@22691 b2dd03c8-39d4-4d8f-98ff-823fe69b080e

Diffstat (limited to 'missing/crypt.c')

0 files changed, 0 insertions, 0 deletions

/* * (C) Copyright 2003-2006 Wolfgang Denk, DENX Software Engineering, * wd@denx.de. * * See file CREDITS for list of people who contributed to this project. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the Free * Software Foundation; either version 2 of the License, or (at your option) * any later version. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License * for more details. * * You should have received a copy of the GNU General Public License along * with this program; if not, write to the Free Software Foundation, Inc., 59 * Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #ifndef __CONFIG_H #define __CONFIG_H /* * High Level Configuration Options * (easy to change) */ #define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */ #define CONFIG_MPC5200 1 /* This is an MPC5200 CPU */ #define CONFIG_V38B 1 /* ...on V38B board */ #define CFG_MPC5XXX_CLKIN 33000000 /* ...running at 33.000000MHz */ #define CONFIG_RTC_PCF8563 1 /* has PCF8563 RTC */ #define CONFIG_MPC5200_DDR 1 /* has DDR SDRAM */ #undef CONFIG_HW_WATCHDOG /* don't use watchdog */ #define CONFIG_NETCONSOLE 1 #define CONFIG_BOARD_EARLY_INIT_R 1 /* do board-specific init */ #define CONFIG_BOARD_EARLY_INIT_F 1 /* do board-specific init */ #define CFG_XLB_PIPELINING 1 /* gives better performance */ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ #define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) # define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ #endif /* * Serial console configuration */ #define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */ #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 } /* * DDR */ #define SDRAM_DDR 1 /* is DDR */ /* Settings for XLB = 132 MHz */ #define SDRAM_MODE 0x018D0000 #define SDRAM_EMODE 0x40090000 #define SDRAM_CONTROL 0x704f0f00 #define SDRAM_CONFIG1 0x73722930 #define SDRAM_CONFIG2 0x47770000 #define SDRAM_TAPDELAY 0x10000000 /* * PCI - no suport */ #undef CONFIG_PCI /* * Partitions */ #define CONFIG_MAC_PARTITION 1 #define CONFIG_DOS_PARTITION 1 /* * USB */ #define CONFIG_USB_OHCI #define CONFIG_USB_STORAGE #define CONFIG_USB_CLOCK 0x0001BBBB #define CONFIG_USB_CONFIG 0x00001000 /* * Supported commands */ #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \ CFG_CMD_FAT | \ CFG_CMD_I2C | \ CFG_CMD_IDE | \ CFG_CMD_PING | \ CFG_CMD_DHCP | \ CFG_CMD_DIAG | \ CFG_CMD_IRQ | \ CFG_CMD_JFFS2 | \ CFG_CMD_MII | \ CFG_CMD_SDRAM | \ CFG_CMD_DATE | \ CFG_CMD_USB | \ CFG_CMD_FAT) #define CONFIG_TIMESTAMP /* Print image info with timestamp */ /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include <cmd_confdefs.h> /* * Boot low with 16 MB Flash */ #define CFG_LOWBOOT 1 #define CFG_LOWBOOT16 1 /* * Autobooting */ #define CONFIG_BOOTDELAY 3 /* autoboot after 3 seconds */ #define CONFIG_PREBOOT "echo;" \ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \ "echo" #undef CONFIG_BOOTARGS #define CONFIG_EXTRA_ENV_SETTINGS \ "bootcmd=run net_nfs\0" \ "bootdelay=3\0" \ "baudrate=115200\0" \ "preboot=echo;echo Type \"run flash_nfs\" to mount root " \ "filesystem over NFS; echo\0" \ "netdev=eth0\0" \ "ramargs=setenv bootargs root=/dev/ram rw wdt=off \0" \ "addip=setenv bootargs $(bootargs) " \ "ip=$(ipaddr):$(serverip):$(gatewayip):" \ "$(netmask):$(hostname):$(netdev):off panic=1\0" \ "flash_nfs=run nfsargs addip;bootm $(kernel_addr)\0" \ "flash_self=run ramargs addip;bootm $(kernel_addr) " \ "$(ramdisk_addr)\0" \ "net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ "nfsroot=$(serverip):$(rootpath) wdt=off\0" \ "hostname=v38b\0" \ "ethact=FEC ETHERNET\0" \ "rootpath=/opt/eldk-3.1.1/ppc_6xx\0" \ "update=prot off ff000000 ff03ffff; era ff000000 ff03ffff; " \ "cp.b 200000 ff000000 $(filesize);" \ "prot on ff000000 ff03ffff\0" \ "load=tftp 200000 $(u-boot)\0" \ "netmask=255.255.0.0\0" \ "ipaddr=192.168.160.18\0" \ "serverip=192.168.1.1\0" \ "ethaddr=00:e0:ee:00:05:2e\0" \ "bootfile=/tftpboot/v38b/uImage\0" \ "u-boot=/tftpboot/v38b/u-boot.bin\0" \ "" #define CONFIG_BOOTCOMMAND "run net_nfs" #if defined(CONFIG_MPC5200) /* * IPB Bus clocking configuration. */ #undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */ #endif /* * I2C configuration */ #define CONFIG_HARD_I2C 1 /* I2C with hardware support */ #define CFG_I2C_MODULE 2 /* Select I2C module #1 or #2 */ #define CFG_I2C_SPEED 100000 /* 100 kHz */ #define CFG_I2C_SLAVE 0x7F /* * EEPROM configuration */ #define CFG_I2C_EEPROM_ADDR 0x50 /* 1010000x */ #define CFG_I2C_EEPROM_ADDR_LEN 1 #define CFG_EEPROM_PAGE_WRITE_BITS 3 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 70 /* * RTC configuration */ #define CFG_I2C_RTC_ADDR 0x51 /* * Flash configuration - use CFI driver */ #define CFG_FLASH_CFI 1 /* Flash is CFI conformant */


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