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| author | Clark Williams <williams@redhat.com> | 2010-08-21 08:37:40 -0500 |
|---|---|---|
| committer | Clark Williams <williams@redhat.com> | 2010-08-21 08:37:40 -0500 |
| commit | 11c971a97d061896d2d402d5bdd300c32229ebb9 (patch) | |
| tree | 2cec50872fbf535b641549e9e09289006c898e4f /rteval | |
| parent | a87c4f1938043b3fa1963ce7acbc22a0a7db7212 (diff) | |
| download | rteval-11c971a97d061896d2d402d5bdd300c32229ebb9.tar.gz rteval-11c971a97d061896d2d402d5bdd300c32229ebb9.tar.xz rteval-11c971a97d061896d2d402d5bdd300c32229ebb9.zip | |
rteval: check if the core id really exists
In SMT systems like Power PC, while we turn off or control multithreading,
the processor id in cpu info need not be in sequence, for the available
cores. This patch adds a minor check that if the core id we range, is
really found in cpu info.
Signed-off-by: Gowrishankar <gowrishankar.m@in.ibm.com>
Tested-by: Gowrishankar <gowrishankar.m@in.ibm.com>
Signed-off-by: Clark Williams <williams@redhat.com>
Diffstat (limited to 'rteval')
| -rw-r--r-- | rteval/cyclictest.py | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/rteval/cyclictest.py b/rteval/cyclictest.py index 27729a0..f00cf14 100644 --- a/rteval/cyclictest.py +++ b/rteval/cyclictest.py @@ -239,6 +239,7 @@ class Cyclictest(Thread): vals = line.split() index = int(vals[0]) for i in range(0, len(self.data)-1): + if str(i) not in self.data: continue self.data[str(i)].bucket(index, int(vals[i+1])) self.data['system'].bucket(index, int(vals[i+1])) for n in self.data.keys(): @@ -252,6 +253,7 @@ class Cyclictest(Thread): self.data["system"].genxml(x) for t in range(0, self.numcores): + if str(t) not in self.data: continue self.data[str(t)].genxml(x) x.closeblock() |