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author | David Sommerseth <davids@redhat.com> | 2012-12-18 22:31:24 +0100 |
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committer | David Sommerseth <davids@redhat.com> | 2012-12-18 22:31:24 +0100 |
commit | efe7c056315f7e613f125089300ae142150aa99c (patch) | |
tree | cf916cc523b88bc5d3306a3f1e95707b8eb4ba76 | |
parent | fa6ff23d9c10e8f94b0d9ed85f4723f4646d0ad3 (diff) | |
download | rteval-efe7c056315f7e613f125089300ae142150aa99c.tar.gz rteval-efe7c056315f7e613f125089300ae142150aa99c.tar.xz rteval-efe7c056315f7e613f125089300ae142150aa99c.zip |
Add module options for the currently available modules
Signed-off-by: David Sommerseth <davids@redhat.com>
-rw-r--r-- | rteval/modules/loads/hackbench.py | 8 | ||||
-rw-r--r-- | rteval/modules/loads/kcompile.py | 11 | ||||
-rw-r--r-- | rteval/modules/measurement/HWLatDetect.py | 18 | ||||
-rw-r--r-- | rteval/modules/measurement/cyclictest.py | 20 |
4 files changed, 57 insertions, 0 deletions
diff --git a/rteval/modules/loads/hackbench.py b/rteval/modules/loads/hackbench.py index e040470..1cdd53c 100644 --- a/rteval/modules/loads/hackbench.py +++ b/rteval/modules/loads/hackbench.py @@ -126,6 +126,14 @@ class Hackbench(CommandLineLoad): del self.__nullfp + +def ModuleParameters(): + return {"jobspercore": {"descr": "Number of working threads per CPU core", + "metavar": "NUM"} + } + + + def create(config, logger): return Hackbench(config, logger) diff --git a/rteval/modules/loads/kcompile.py b/rteval/modules/loads/kcompile.py index bcb033a..1f8a66a 100644 --- a/rteval/modules/loads/kcompile.py +++ b/rteval/modules/loads/kcompile.py @@ -175,5 +175,16 @@ class Kcompile(CommandLineLoad): self._setFinished() + +def ModuleParameters(): + return {"tarball": {"descr": "Source tar ball", + "default": "linux-2.6.21.tar.bz2", + "metavar": "TARBALL"}, + "jobspercore": {"descr": "Number of working threads per core", + "metavar": "NUM"} + } + + + def create(config, logger): return Kcompile(config, logger) diff --git a/rteval/modules/measurement/HWLatDetect.py b/rteval/modules/measurement/HWLatDetect.py index e642315..b5af34a 100644 --- a/rteval/modules/measurement/HWLatDetect.py +++ b/rteval/modules/measurement/HWLatDetect.py @@ -121,6 +121,24 @@ def ModuleInfo(): "loads": False} + +def ModuleParameters(): + return {"threshold": {"descr": "Specify the TSC gap in microseconds used to detect an SMI", + "default": 15, + "metavar": "MICROSEC"}, + "window": {"descr": "Sample window size (in microseconds)", + "default": 1000000, + "metavar": "MICROSEC"}, + "width": {"descr": "Sampling width inside the sampling window (in microseconds)", + "default": 800000, + "metavar": "MICROSEC"}, + "duration": {"descr": "How long in seconds to run hwlatdetect", + "default": 15, + "metavar": "SEC"} + } + + + def create(params, logger): return HWLatDetectRunner(params, logger) diff --git a/rteval/modules/measurement/cyclictest.py b/rteval/modules/measurement/cyclictest.py index 4be0238..59a6dcd 100644 --- a/rteval/modules/measurement/cyclictest.py +++ b/rteval/modules/measurement/cyclictest.py @@ -296,10 +296,30 @@ class Cyclictest(rtevalModulePrototype): return rep_n + def ModuleInfo(): return {"parallel": True, "loads": True} + + +def ModuleParameters(): + return {"interval": {"descr": "Base interval of the threads in microseconds", + "default": 100, + "metavar": "INTV_US"}, + "buckets": {"descr": "Histogram width", + "default": 2000, + "metavar": "NUM"}, + "distance": {"descr": "The distance of the thread intervals in microseconds", + "default": 0, + "metavar": "DIST_US"}, + "priority": {"descr": "Run cyclictest with the given priority", + "default": 95, + "metavar": "PRIO"} + } + + + def create(params, logger): return Cyclictest(params, logger) |