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| author | David Sommerseth <davids@redhat.com> | 2009-05-19 17:09:48 +0200 |
|---|---|---|
| committer | David Sommerseth <davids@redhat.com> | 2009-05-20 14:19:58 +0200 |
| commit | ff36dbbc2804858ad7229e1b6bda51fc2250133d (patch) | |
| tree | d87118727b8444c6cc22d8ab4099351a6d078c72 /src/dmidecode.c | |
| parent | eff9145436de625fdf0be489be95118c69ec3a2e (diff) | |
| download | python-dmidecode-ff36dbbc2804858ad7229e1b6bda51fc2250133d.tar.gz python-dmidecode-ff36dbbc2804858ad7229e1b6bda51fc2250133d.tar.xz python-dmidecode-ff36dbbc2804858ad7229e1b6bda51fc2250133d.zip | |
Changed the node content of /dmidecode/ProcessorInfo/CPUCore/cpu_flags/flag to maintain backwards compatibility
The old python-dmidecode uses the format '{flag} ({description})'. This
format is now used is well as contents for the cpu_flags/flag text nodes.
Diffstat (limited to 'src/dmidecode.c')
| -rw-r--r-- | src/dmidecode.c | 60 |
1 files changed, 30 insertions, 30 deletions
diff --git a/src/dmidecode.c b/src/dmidecode.c index 6cee5cf..7abec47 100644 --- a/src/dmidecode.c +++ b/src/dmidecode.c @@ -960,38 +960,38 @@ xmlNode *dmi_processor_id(xmlNode *node, u8 type, const u8 * p, const char *vers const char *descr; } flags[] = { /* *INDENT-OFF* */ - {"FPU", "Floating-point unit on-chip"}, /* 0 */ - {"VME", "Virtual mode extension"}, - {"DE", "Debugging extension"}, - {"PSE", "Page size extension"}, - {"TSC", "Time stamp counter"}, - {"MSR", "Model specific registers"}, - {"PAE", "Physical address extension"}, - {"MCE", "Machine check exception"}, - {"CX8", "CMPXCHG8 instruction supported"}, - {"APIC", "On-chip APIC hardware supported"}, + {"FPU", "FPU (Floating-point unit on-chip)"}, /* 0 */ + {"VME", "VME (Virtual mode extension)"}, + {"DE", "DE (Debugging extension)"}, + {"PSE", "PSE (Page size extension)"}, + {"TSC", "TSC (Time stamp counter)"}, + {"MSR", "MSR (Model specific registers)"}, + {"PAE", "PAE (Physical address extension)"}, + {"MCE", "MCE (Machine check exception)"}, + {"CX8", "CX8 (CMPXCHG8 instruction supported)"}, + {"APIC", "APIC (On-chip APIC hardware supported)"}, {NULL, NULL}, /* 10 */ - {"SEP", "Fast system call"}, - {"MTRR", "Memory type range registers"}, - {"PGE", "Page global enable"}, - {"MCA", "Machine check architecture"}, - {"CMOV", "Conditional move instruction supported"}, - {"PAT", "Page attribute table"}, - {"PSE-36", "36-bit page size extension"}, - {"PSN", "Processor serial number present and enabled"}, - {"CLFSH", "CLFLUSH instruction supported"}, + {"SEP", "SEP (Fast system call)"}, + {"MTRR", "MTRR (Memory type range registers)"}, + {"PGE", "PGE (Page global enable)"}, + {"MCA", "MCA (Machine check architecture)"}, + {"CMOV", "CMOV (Conditional move instruction supported)"}, + {"PAT", "PAT (Page attribute table)"}, + {"PSE-36", "PSE-36 (36-bit page size extension)"}, + {"PSN", "PSN (Processor serial number present and enabled)"}, + {"CLFSH", "CLFLUSH (CLFLUSH instruction supported)"}, {NULL, NULL }, /* 20 */ - {"DS", "Debug store"}, - {"ACPI", "ACPI supported"}, - {"MMX", "MMX technology supported"}, - {"FXSR", "Fast floating-point save and restore"}, - {"SSE", "Streaming SIMD extensions"}, - {"SSE2", "Streaming SIMD extensions 2"}, - {"SS", "Self-snoop"}, - {"HTT", "Hyper-threading technology"}, - {"TM", "Thermal monitor supported"}, - {"IA64", "IA64 capabilities"}, - {"PBE", "Pending break enabled"} /* 31 */ + {"DS", "DS (Debug store)"}, + {"ACPI", "ACPI (ACPI supported)"}, + {"MMX", "MMX (MMX technology supported)"}, + {"FXSR", "FXSR (Fast floating-point save and restore)"}, + {"SSE", "SSE (Streaming SIMD extensions)"}, + {"SSE2", "SSE2 (Streaming SIMD extensions 2)"}, + {"SS", "SS (Self-snoop)"}, + {"HTT", "HTT (Hyper-threading technology)"}, + {"TM", "TM (Thermal monitor supported)"}, + {"IA64", "IA64 (IA64 capabilities)"}, + {"PBE", "PBE (Pending break enabled)"} /* 31 */ /* *INDENT-ON* */ }; |