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authornima <nima@abc39116-655e-4be6-ad55-d661dc543056>2008-07-26 09:15:53 +0000
committernima <nima@abc39116-655e-4be6-ad55-d661dc543056>2008-07-26 09:15:53 +0000
commit65cca18ecfb4c72faf0cf77872f3db494aa80c35 (patch)
tree91c78395e1bf516986279700607ba37724a72abd /example.py
parent8671ea0ba8caa35428afeee68efa53671c839815 (diff)
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Completed cases 1, 4, and 13. Also altered the main PyDict object such that
each case has a value of a list to which items are appended. Without this, each object of the same type would overwrite the previous, for example, 8 processors would result in one single cpu with data pertaining to the last cpu (7). git-svn-id: svn://svn.autonomy.net.au/python-dmidecode@25 abc39116-655e-4be6-ad55-d661dc543056
Diffstat (limited to 'example.py')
-rwxr-xr-xexample.py4
1 files changed, 2 insertions, 2 deletions
diff --git a/example.py b/example.py
index 7cdda39..76d1cf2 100755
--- a/example.py
+++ b/example.py
@@ -9,11 +9,11 @@ def l(x):
import dmidecode, time
-print "*** bios ***\n", l(dmidecode.bios())
+#print "*** bios ***\n", l(dmidecode.bios())
#print "*** system ***\n", l(dmidecode.system())
#print "*** baseboard ***\n", l(dmidecode.baseboard())
#print "*** chassis ***\n", l(dmidecode.chassis())
-#print "*** processor ***\n", l(dmidecode.processor())
+print "*** processor ***\n", l(dmidecode.processor())
#print "*** memory ***\n", l(dmidecode.memory())
#print "*** cache ***\n", l(dmidecode.cache())
#print "*** connector ***\n", l(dmidecode.connector())