imsm: detect option-rom capabilities

The option-rom advertises its capabilities in a data structure located in
the platform ROM region 0xc0000-0xf0000.  Attempt to detect the option-rom
and limit array creation to the platform's capabilities.

Signed-off-by: Dan Williams <dan.j.williams@intel.com>

1 files changed, 89 insertions, 0 deletions

diff --git a/platform-intel.h b/platform-intel.h
new file mode 100644
index 0000000..9252002
--- /dev/null
+++ b/platform-intel.h
@@ -0,0 +1,89 @@
+/*
+ * Intel(R) Matrix Storage Manager hardware and firmware support routines
+ *
+ * Copyright (C) 2008 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#include <asm/types.h>
+
+/* The IMSM OROM Version Table definition */
+struct imsm_orom {
+	__u8 signature[4];
+	__u8 table_ver_major; /* Currently 2 (can change with future revs) */
+	__u8 table_ver_minor; /* Currently 2 (can change with future revs) */
+	__u16 major_ver; /* Example: 8 as in 8.6.0.1020 */
+	__u16 minor_ver; /* Example: 6 as in 8.6.0.1020 */
+	__u16 hotfix_ver; /* Example: 0 as in 8.6.0.1020 */
+	__u16 build; /* Example: 1020 as in 8.6.0.1020 */
+	__u8 len; /* number of bytes in this entire table */
+	__u8 checksum; /* checksum of all the bytes in this table */
+	__u16 rlc; /* RAID Level Capability */
+	/* we assume the cpu is x86 as the orom should not be found
+	 * anywhere else
+	 */
+	#define IMSM_OROM_RLC_RAID0 (1 << 0)
+	#define IMSM_OROM_RLC_RAID1 (1 << 1)
+	#define IMSM_OROM_RLC_RAID10 (1 << 2)
+	#define IMSM_OROM_RLC_RAID1E (1 << 3)
+	#define IMSM_OROM_RLC_RAID5 (1 << 4)
+	#define IMSM_OROM_RLC_RAID_CNG (1 << 5)
+	__u16 sss; /* Strip Size Supported */
+	#define IMSM_OROM_SSS_2kB (1 << 0)
+	#define IMSM_OROM_SSS_4kB (1 << 1)
+	#define IMSM_OROM_SSS_8kB (1 << 2)
+	#define IMSM_OROM_SSS_16kB (1 << 3)
+	#define IMSM_OROM_SSS_32kB (1 << 4)
+	#define IMSM_OROM_SSS_64kB (1 << 5)
+	#define IMSM_OROM_SSS_128kB (1 << 6)
+	#define IMSM_OROM_SSS_256kB (1 << 7)
+	#define IMSM_OROM_SSS_512kB (1 << 8)
+	#define IMSM_OROM_SSS_1MB (1 << 9)
+	#define IMSM_OROM_SSS_2MB (1 << 10)
+	#define IMSM_OROM_SSS_4MB (1 << 11)
+	#define IMSM_OROM_SSS_8MB (1 << 12)
+	#define IMSM_OROM_SSS_16MB (1 << 13)
+	#define IMSM_OROM_SSS_32MB (1 << 14)
+	#define IMSM_OROM_SSS_64MB (1 << 15)
+	__u16 dpa; /* Disks Per Array supported */
+	__u16 tds; /* Total Disks Supported */
+	__u8 vpa; /* # Volumes Per Array supported */
+	__u8 vphba; /* # Volumes Per Host Bus Adapter supported */
+	/* Attributes supported. This should map to the
+	 * attributes in the MPB. Also, lower 16 bits
+	 * should match/duplicate RLC bits above.
+	 */
+	__u32 attr;
+	#define IMSM_OROM_ATTR_RAID0 IMSM_OROM_RLC_RAID0
+	#define IMSM_OROM_ATTR_RAID1 IMSM_OROM_RLC_RAID1
+	#define IMSM_OROM_ATTR_RAID10 IMSM_OROM_RLC_RAID10
+	#define IMSM_OROM_ATTR_RAID1E IMSM_OROM_RLC_RAID1E
+	#define IMSM_OROM_ATTR_RAID5 IMSM_OROM_RLC_RAID5
+	#define IMSM_OROM_ATTR_RAID_CNG IMSM_OROM_RLC_RAID_CNG
+	#define IMSM_OROM_ATTR_2TB (1 << 29)
+	#define IMSM_OROM_ATTR_PM (1 << 30)
+	#define IMSM_OROM_ATTR_ChecksumVerify (1 << 31)
+	__u32 reserved1;
+	__u32 reserved2;
+} __attribute__((packed));
+
+struct sys_dev {
+	char *path;
+	struct sys_dev *next;
+};
+
+struct sys_dev *find_driver_devices(const char *bus, const char *driver);
+__u16 devpath_to_vendor(const char *dev_path);
+void free_sys_dev(struct sys_dev **list);
+const struct imsm_orom *find_imsm_orom(void);