summaryrefslogtreecommitdiffstats
path: root/arch/mips/mach-mscc/gpio.c
blob: d6b4c5d7684bfb9427c90f148df1ef9dc21665a6 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2018 Microsemi Corporation
 */

#include <common.h>
#include <asm/io.h>
#include <linux/bitops.h>

void mscc_gpio_set_alternate(int gpio, int mode)
{
	u32 mask = BIT(gpio);
	u32 val0, val1;

	val0 = readl(BASE_DEVCPU_GCB + GPIO_ALT(0));
	val1 = readl(BASE_DEVCPU_GCB + GPIO_ALT(1));

	if (mode == 1) {
		val0 |= mask;
		val1 &= ~mask;
	} else if (mode == 2) {
		val0 &= ~mask;
		val1 |= mask;
	} else if (mode == 3) {
		val0 |= mask;
		val1 |= mask;
	} else {
		val0 &= ~mask;
		val1 &= ~mask;
	}

	writel(val0, BASE_DEVCPU_GCB + GPIO_ALT(0));
	writel(val1, BASE_DEVCPU_GCB + GPIO_ALT(1));
}