blob: bcdeecc0e024e997fe24f4ee3f2177a7f61a6536 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
|
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019, Intel Corporation
*/
#include "socfpga_agilex.dtsi"
/ {
model = "SoCFPGA Agilex SoCDK";
aliases {
serial0 = &uart0;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
ethernet2 = &gmac2;
};
chosen {
stdout-path = "serial0:115200n8";
};
leds {
compatible = "gpio-leds";
hps0 {
label = "hps_led0";
gpios = <&portb 20 GPIO_ACTIVE_HIGH>;
};
hps1 {
label = "hps_led1";
gpios = <&portb 19 GPIO_ACTIVE_HIGH>;
};
hps2 {
label = "hps_led2";
gpios = <&portb 21 GPIO_ACTIVE_HIGH>;
};
};
memory {
device_type = "memory";
/* We expect the bootloader to fill in the reg */
reg = <0 0 0 0>;
};
soc {
clocks {
osc1 {
clock-frequency = <25000000>;
};
};
};
};
&gpio1 {
status = "okay";
};
&gmac0 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy0>;
max-frame-size = <9000>;
mdio0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
phy0: ethernet-phy@0 {
reg = <4>;
txd0-skew-ps = <0>; /* -420ps */
txd1-skew-ps = <0>; /* -420ps */
txd2-skew-ps = <0>; /* -420ps */
txd3-skew-ps = <0>; /* -420ps */
rxd0-skew-ps = <420>; /* 0ps */
rxd1-skew-ps = <420>; /* 0ps */
rxd2-skew-ps = <420>; /* 0ps */
rxd3-skew-ps = <420>; /* 0ps */
txen-skew-ps = <0>; /* -420ps */
txc-skew-ps = <900>; /* 0ps */
rxdv-skew-ps = <420>; /* 0ps */
rxc-skew-ps = <1680>; /* 780ps */
};
};
};
&mmc {
status = "okay";
cap-sd-highspeed;
broken-cd;
bus-width = <4>;
};
&uart0 {
status = "okay";
};
&usb0 {
status = "okay";
disable-over-current;
};
&watchdog0 {
status = "okay";
};
&qspi {
flash0: flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mt25qu02g";
reg = <0>;
spi-max-frequency = <100000000>;
m25p,fast-read;
cdns,page-size = <256>;
cdns,block-size = <16>;
cdns,read-delay = <1>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
qspi_boot: partition@0 {
label = "Boot and fpga data";
reg = <0x0 0x034B0000>;
};
qspi_rootfs: partition@34B0000 {
label = "Root Filesystem - JFFS2";
reg = <0x034B0000 0x0EB50000>;
};
};
};
};
|
