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| | * | x86: apl: Support writing the IntelGraphicsMem tableSimon Glass2020-09-251-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This table is needed by the Linux graphics driver to handle graphics correctly. Write it to ACPI. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | i2c: Add a generic driver to generate ACPI infoSimon Glass2020-09-252-0/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many I2C devices produce roughly the same ACPI data with just things like the GPIO/interrupt information being different. This can be handled by a generic driver along with some information in the device tree. Add a generic i2c driver for this purpose. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
| | * | dm: acpi: Use correct GPIO polarity type in acpi_dp_add_gpio()Simon Glass2020-09-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This function currently accepts the IRQ-polarity type. Fix it to use the GPIO type instead. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | acpi: Support generating a multi-function _DSM for devicesSimon Glass2020-09-252-0/+113
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function to generate ACPI code for a _DSM method for a device. This includes functions for starting and ending each part of the _DSM. Signed-off-by: Simon Glass <sjg@chromium.org> [bmeng: fix the "new blank line at EOF" git warning] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| | * | acpi: Add support for conditions and return valuesSimon Glass2020-09-251-0/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add functions to support generating ACPI code for condition checks and return values. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | acpi: Add support for writing a _PRWSimon Glass2020-09-251-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | A 'Power Resource for Wake' list the resources a device depends on for wake. Add a function to generate this. Signed-off-by: Simon Glass <sjg@chromium.org>
| | * | x86: coral: Add ACPI tables for coralSimon Glass2020-09-251-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This device has a large set of ACPI tables. Bring these in from coreboot so that full functionality is available (apart from SMI). Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | Merge tag 'xilinx-for-v2021.01' of ↵Tom Rini2020-09-244-6/+54
| |\ \ \ | | |/ / | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.01 arm64: - Support for bigger U-Boot images compiled with PIE microblaze: - Extend support for LE/BE systems zynqmp: - Refactor silicon ID detection code with using firmware interface - Add support for saving variables based on bootmode zynqmp-r5: - Fix MPU mapping and defconfig setting. xilinx: - Minor driver changes: names alignment - Enable UBIFS - Minor DT and macros fixes - Fix boot with appended DT - Fix distro boot cmd: - pxe: Add fixing for platforms with manual relocation support clk: - fixed_rate: Add DM flag to support early boot on r5 fpga: - zynqmppl: Use only firmware interface and enable SPL build serial: - uartlite: Enable for ARM systems and support endians mmc: - zynq: Fix indentation net: - gem: Support for multiple phys - emac: Fix 64bit support and enable it for arm64 kconfig: - Setup default values for Xilinx platforms - Fix dependecies for Xilinx drivers - Source board Kconfig only when platform is enabled - Fix FPGA Kconfig entry with SPL - Change some defconfig values bindings: - Add binding doc for vsc8531
| | * | xilinx: versal: Fix compilation error when !CONFIG_NETMichal Simek2020-09-231-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | PXE and DHCP shouldn't be listed when commands are not enabled that's why handle it in the same way as is done for Zynq and ZynqMP. Fixes: ec48b6c991f4 ("arm64: versal: Add support for new Xilinx Versal ACAPs") Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | fpga: kconfig: Rename SPL_FPGA_SUPPORT to SPL_FPGAMichal Simek2020-09-231-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch does sed 's/SPL_FPGA_SUPPORT/SPL_FPGA/g' but also fixing Makefile and zynqmp.c to simplify if/endif logic in zynqmp.c. This change is mostly done to be able to use CONFIG_IS_ENABLED macro and obj-$(CONFIG_$(SPL_)FPGA) in Makefile. For them symbols need to be in sync. And removing one line from Topic Miami boards which is not needed because symbol is not enabled via Kconfig. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * | fpga: zynqmp: Get rid of ZYNQMP_SIP_SVC* macrosMichal Simek2020-09-231-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no need to use these macros because enum pm_api_id can be used instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| | * | include: dt-bindings: Add MSCC headerHarini Katakam2020-09-231-0/+40
| | |/ | | | | | | | | | | | | | | | | | | | | | Add MSCC header with delay definitions for VSC8531 and associated family devices. Signed-off-by: Harini Katakam <harini.katakam@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | board/freescale: Remove P5020DS board supportPriyanka Jain2020-09-241-25/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P5020DS board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1024RDB board supportPriyanka Jain2020-09-241-12/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1024RDB board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1021RDB board supportPriyanka Jain2020-09-241-18/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1021RDB board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1020MBG board supportPriyanka Jain2020-09-241-12/+2
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1020MBG board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1020UTM board supportPriyanka Jain2020-09-241-11/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1020UTM board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove P1025RDB board supportPriyanka Jain2020-09-241-51/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc P1025RDB board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | board/freescale: Remove p1023rdb board supportPriyanka Jain2020-09-241-338/+0
| | | | | | | | | | | | | | | | | | | | | Remove NXP powerpc p1023rdb board support as it is no longer maintained. Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | configs: p1_p2_rdb: Add the default address of vsc7385 firmwareHou Zhiqiang2020-09-241-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add the environment 'vscfw_addr' to assign a default address for vsc7385 firmware uploading. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | net: tsec: Add the compatible string "gianfar" supportHou Zhiqiang2020-09-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add compatible string "gianfar" support and update the device-tree-bindings doc. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | net: fsl_mdio: Correct the MII management register block addressHou Zhiqiang2020-09-241-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MII management register block offset is different between gianfar and etsec2 compatible devices, this patch is to fix this issue by adding driver data for different compatible string. Fixes: 2932c5a802a9 ("net: tsec: fsl_mdio: add DM MDIO support") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
| * | dm: add cells_count parameter in live DT APIs of_parse_phandle_with_argsPatrick Delaunay2020-09-221-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the live tree API ofnode_parse_phandle_with_args, the cell_count argument must be used when cells_name is NULL. But this argument is not provided to the live DT function of_parse_phandle_with_args even it is provided to fdtdec_parse_phandle_with_args. This patch adds support of the cells_count parameter in dev_ and of_node API to allow migration and support of live DT: - of_parse_phandle_with_args Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | fdtdec: optionally add property no-map to created reserved memory nodeEtienne Carriere2020-09-221-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add boolean input argument @no_map to helper function fdtdec_add_reserved_memory() to add or not "no-map" property for an added reserved memory node. Property no-map is used by the Linux kernel to not not map memory in its static memory mapping. It is needed for example for the| consistency of system non-cached memory and to prevent speculative accesses to some firewalled memory. No functional change. A later change will update to OPTEE library to add no-map property to OP-TEE reserved memory nodes. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | core: improve of_match_ptr with OF_PLATDATAWalter Lozano2020-09-221-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently of_match_ptr is used to avoid referencing compatible strings when OF_CONTROL is not enabled. This behaviour could be improved by taking into account also OF_PLATDATA, as when this configuration is enabled the compatible strings are not used at all. Signed-off-by: Walter Lozano <walter.lozano@collabora.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | Merge branch 'master' into nextTom Rini2020-09-217-17/+12
| |\| | | | | | | | | | Merge in v2020.10-rc5
| * | reset: Add IPQ40xx reset controller driverRobert Marko2020-09-181-0/+92
| | | | | | | | | | | | | | | | | | | | | | | | On Qualcomm IPQ40xx SoC series, GCC clock IP also handles the resets. So since this will be needed by further drivers, lets add a driver for the reset controller. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | mpc83xx, keymile boards: enable DM_ETH and add DTSHeiko Schocher2020-09-173-38/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable DTS support for keymile mpc83xx based boards. get rid of compile warning: ===================== WARNING ====================== This board does not use CONFIG_DM_ETH (Driver Model for Ethernet drivers). Please update the board to use CONFIG_DM_ETH before the v2020.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. ==================================================== Therefore done: - add DTS for all mpc83xx based boards from keymile mainly they are not mainlined to linux. - add u-boot specific dtsi - add stdout-path - add missing ucc4 par_io definitions, which were in board code, but not in linux DTS - remove not used ethernet nodes Signed-off-by: Heiko Schocher <hs@denx.de> Patch-cc: Mario Six <mario.six@gdsys.cc> Patch-cc: Qiang Zhao <qiang.zhao@nxp.com> Series-to: u-boot Series-version: 3 Series-changes: 3 - rebase patchset to current mainline commit c0192950df - update defconfig files Series-changes: 2 - add patch which fixes Codingstyle errors in drivers/qe - add patch which converts the mpc83xx based boards from keymile to DM_ETH Cover-letter: powerpc, mpc83xx: add DM_ETH support This patch series adds DM ethernet support for mpc83xx based keymile boards. Travis build: END
| * | powerpc, qe: add DTS support for parallel I/O portsHeiko Schocher2020-09-171-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | add DM support for parallel I/O ports on QUICC Engine Block Signed-off-by: Heiko Schocher <hs@denx.de> Patch-cc: Mario Six <mario.six@gdsys.cc> Patch-cc: Qiang Zhao <qiang.zhao@nxp.com> Patch-cc: Holger Brunck <holger.brunck@hitachi-powergrids.com> Series-changes: 2 - remove RFC - fixed Codingstyle errors, therefore new patch powerpc, mpc83xx: fix codingstyle issues for qe_io.c - moved DM part to drivers/pinctrl Commit-notes: Open questions / discussion: - I let the old none DM based implementation in code so boards should work with old implementation. This should be removed if all boards are converted to DM/DTS. - Unfortunately linux DTS does not use "pinctrl-" properties, instead "pio-handle" properties. Even worser old U-Boot code initializes all pins defined in "const qe_iop_conf_t qe_iop_conf_tab[]" table in board code. As linux does the same I decided to also scan through all subnodes containing "pio-map" property and initialize them too. The proper solution would be to check for "pio-handle" when a device is probed. END
| * | Merge tag 'ti-v2021.01-next' of ↵Tom Rini2020-09-154-8/+119
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next - Hyperflash boot for J7200 - Update Main R5FSS lockstep mode - R5F remoteproc support for J7200 - Minor env fixes - Add SPI boot support for am335x-icev2
| | * | arm: mach-omap2: am33xx: Add device structure for spiFaiz Abbas2020-09-152-2/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add platform data and a device structure for the spi device present on am335x-icev2. This requires moving all omap3_spi platform data structures and symbols to an omap3_spi.h so that the board file can access them. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
| | * | am335x_evm: Allow booting from usb-storage deviceMatwey V. Kornilov2020-09-151-0/+7
| | | | | | | | | | | | | | | | Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
| | * | ti: Use devtype=mmc instead of setenv devtype mmcMatwey V. Kornilov2020-09-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If devtype variable is setted via setenv, then the following devtype=X style is ignored. Currently, many u-boot commands use devtype variable in the latter manner: mmc_boot=if mmc dev ${devnum}; then devtype=mmc; run scan_dev_for_boot_part; fi Use devtype=mmc instead of setenv devtype mmc to avoid bugs with booting from another devtype. Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
| | * | env: ti: j721e-evm: Update R5 SPL rproc env variables for J7200Suman Anna2020-09-151-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The R5 SPL on J7200 SoCs will be limited to booting just the MCU R5FSS0 R5F core in LockStep-mode at present, so add the two required environment variables 'addr_mcur5f0_0load' and 'name_mcur5f0_0fw' that are needed by the R5 SPL early-boot logic. The firmware name used is also different from that on J721E SoCs. Signed-off-by: Suman Anna <s-anna@ti.com>
| | * | env: ti: j721e-evm: Update rproc_fw_binaries env variable for J7200Suman Anna2020-09-151-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The J7200 SoCs have different number of remote processors, but reuse the same environment settings as the J721E SoCs. The current env variable rproc_fw_binaries is geared towards J721E SoCs and is incorrect for J7200 SoCs. Please see the logic originally added in commit 0b4ab9c9a754 ("env: ti: j721e-evm: Add support to boot rprocs including R5Fs and DSPs"). Fix this by defining the DEFAULT_RPROCS macro appropriately using the corresponding TARGET_EVM Kconfig symbol. This macro is used by the 'rproc_fw_binaries' env variable in the common remoteproc env header file k3_rproc.h. The list of R5F cores to be started before loading and booting the Linux kernel are as follows, and mainly comprises of the Main R5FSS0 cores in this order: Main R5FSS0 (Split) Core0 : 2 /lib/firmware/j7200-main-r5f0_0-fw Main R5FSS0 (Split) Core1 : 3 /lib/firmware/j7200-main-r5f0_1-fw The MCU R5FSS0 is in LockStep mode and is expected to be booted by R5 SPL, so it is not included in the list. The order of rprocs to boot cannot be really modified as only the Main R5FSS0 cores are involved and Core0 has to be booted first always before the corresponding Core1. Signed-off-by: Suman Anna <s-anna@ti.com>
| | * | env: ti: j721e-evm: Limit scope of rproc env variables used by R5 SPLSuman Anna2020-09-151-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 316c927135d6 ("include: configs: j721e_evm: Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0") added four different new env variables 'addr_mainr5f0_0load', 'name_mainr5f0_0fw', 'addr_mcur5f0_0load' and 'name_mcur5f0_0fw' to the generic environment, but these are only needed and used in R5 SPL for early-booting the MCU R5FSS0 and Main R5FSS0 Core0 on J721E SoCs. These are not really needed for A72 U-Boot, so limit the scope of these variables only to R5 SPL. While at this, also fix the loadaddr variable values to include the hex prefix like with other such env variables. Cc: Keerthy <j-keerthy@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com>
| | * | configs: j721e_evm: Add Main R5FSS1 Core1 to default rproc boot listSuman Anna2020-09-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The default rproc list currently used by A72 U-Boot to boot various remote processors include the Main R5FSS0 (Split-mode) Core1, Main R5FSS1 (LockStep mode) Core0 and the three DSPs. The Main R5FSS1 cluster is configured for Split mode by default in the dts now, so add the Main R5FSS1 Core1 (rproc #5) to the default rproc boot list. This core is now booted after the Main R5FSS1 Core0 and before the DSPs. The order of the rprocs to boot can always be changed at runtime if desired by overwriting the 'rproc_fw_binaries' environment variable at U-boot prompt. Note that the R5FSS Core1 cannot be booted before its associated Core0. Signed-off-by: Suman Anna <s-anna@ti.com>
| | * | configs: j721e_evm.h: Add U-Boot image address for HyperFlash bootVignesh Raghavendra2020-09-151-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add memory mapped address location of U-Boot images in HyperFlash boot mode. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
| * | | dt-bindings: clock: import Qualcomm IPQ4019 bindingsRobert Marko2020-09-091-0/+96
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Import Qualcomm IPQ4019 GCC bindings from Linux. This will enable using bindings instead of raw clock numbers both in the driver and DTS like Linux does. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | | cosmetic: aspeed: Modify for SPDX-LicenseRyan Chen2020-09-091-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Modify SPDX-License for furture patch warning Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
| * | | clock:aspeed: Sync with Linux kernel clock header defineRyan Chen2020-09-091-28/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | v2: modify title description aspeed:clock -> clock:aspeed Use kernel include/dt-bindings/clock/aspeed-clock.h define for clock driver. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
| * | | cosmetic: aspeed: ast2500: Rename clock headerRyan Chen2020-09-091-0/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename the ast2500-scu.h to aspeed-clock.h. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org>
| * | | cmd: broadcom: add command for chimp handshakeBharat Kumar Reddy Gooty2020-09-091-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add command for chimp handshake. Handshake is used to know chimp is loaded and booted successfully. Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | cmd: broadcom: add bnxt boot commandTrac Hoang2020-09-091-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Chimp is a core in Broadcom netxtream controller (bnxt). Add command to load binary to chimp and boot bnxt. Signed-off-by: Trac Hoang <trac.hoang@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | | Merge branch 'remove-config-nr-dram-banks-v9-2020-08-26' of ↵Tom Rini2020-09-072-6/+0
| |\ \ \ | | |/ / | |/| | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-marvell into next
| | * | asm-generic/u-boot.h: Remove bi_memstart & bi_memsize from bd_infoStefan Roese2020-08-261-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bi_memstart & bi_memsize are now not referenced any more. This patch removes their definitions from the bd_info struct. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| | * | CONFIG_NR_DRAM_BANKS: Remove unreferenced code as its always definedStefan Roese2020-08-262-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 86cf1c82850f ("configs: Migrate CONFIG_NR_DRAM_BANKS") & commit 999a772d9f24 ("Kconfig: Migrate CONFIG_NR_DRAM_BANKS"), CONFIG_NR_DRAM_BANKS is always defined with a value (4 is default). It makes no sense to still carry code that is guarded with "#ifndef CONFIG_NR_DRAM_BANKS" (and similar). This patch removes all these unreferenced code paths. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | | board: tbs2910: Use recommended distroboot addressesSoeren Moch2020-10-021-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to doc/README.distro fdt_addr must not be set when DTB is not available from hardware. So remove this entry. Use address 32MB above the start of DRAM for kernel_addr_r. This way we likely can avoid the self-relocation of the compressed kernel image before it decompresses to offset 0x8000 from start of DRAM. Use address 128MB above the start of DRAM for fdt_addr_r, since this is the maximum location for the end of the kernel. So we avoid overwriting the DTB. Use 512k above that for ramdisk_addr_r. This should be enough for the DTB, rest of DRAM can be used for initrd. Place boot script / extlinux.conf at offset 0 / 1MB from start of DRAM. This space is available for processing in U-Boot. Signed-off-by: Soeren Moch <smoch@web.de> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | | Merge tag 'efi-2020-10-rc6' of ↵Tom Rini2020-09-281-1/+2
|\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-efi Pull request for UEFI sub-system for efi-2020-10-rc6 The following UEFI related issues are fixed: * restore the global data pointer in the RISC-V trap handler * install EFI_RNG_PROTOCOL only if we have a random number generator * display human readable string for EFI_RNG_PROTOCOL in efidebug command
| * | | | efi_loader: installation of EFI_RNG_PROTOCOLHeinrich Schuchardt2020-09-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having an EFI_RNG_PROTOCOL without a backing RNG device leads to failure to boot Linux 5.8. Only install the EFI_RNG_PROTOCOL if we have a RNG device. Reported-by: Scott K Logan <logans@cottsay.net> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>