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* riscv: dts: add fu740 supportGreen Wan2021-05-312-0/+44
| | | | | | | | | | | Add dts support for fu740. The HiFive Unmatched support is based on fu740 cpu and drivers in following patch set. Signed-off-by: Green Wan <green.wan@sifive.com> [greentime.hu: set fu740 speed to 1.2GHz] Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
* arm64: zynqmp: Add pinctrl descriptionMichal Simek2021-05-191-0/+19
| | | | | | | ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* dt-bindings: pinctrl: k3: Introduce pinmux definitions for AM64Dave Gerlach2021-05-121-1/+4
| | | | | | | | Add pinctrl macros for AM64 SoC. These macro definitions are similar to that of previous platforms, but adding new definitions to avoid any naming confusions in the soc dts files. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
* phy: marvell: add support for SFI1Igal Liberman2021-04-291-4/+5
| | | | | | | | | | | | | | | In CP115, comphy4 can be configured into SFI port1 (in addition to SFI0). This patch adds the option described above. In addition, rename all existing SFI/XFI references: COMPHY_TYPE_SFI --> COMPHY_TYPE_SFI0 No functional change for exsiting configuration. Change-Id: If9176222e0080424ba67347fe4d320215b1ba0c0 Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* phy: marvell: cp110: remove unused definitionsMarcin Wojtas2021-04-291-30/+20
| | | | | | | | | | | | Even if comphy types of SATA2/SATA3/SGMII3 and comphy speeds of 1.5G/3G/6.25G were referenced in the driver non configuration (dts) was using it. This patch removes unused definitions. Change-Id: I53ed6f9d3a82b9d18cb4e488bc14d3cf687f9488 Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* phy: marvell: rename comphy related definitions to COMPHY_XXIgal Liberman2021-04-291-45/+45
| | | | | | | | | | | | | | | Currently, all comphy definitions are PHY_TYPE_XX and PHY_SPEEED_XX. Those definition might be confused with MDIO PHY definitions. This patch does the following changes: - PHY_TYPE_XX --> COMPHY_TYPE_XX - PHY_SPEED_XX --> COMPHY_SPEED_XX This improves readability, no functional change. Change-Id: I2bd1d9289ebbc5c16fa80f9870f797ea1bcaf5fa Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
* phy: marvell: add comphy type PHY_TYPE_USB3jinghua2021-04-291-12/+13
| | | | | | | | | | | | | - For some Marvell SoCs, like armada-3700, there are both USB host and device controller, but on PHY level the configuration is the same. - The new type supports both USB device and USB host - This patch is cherry-picked from u-boot-2015 as-is. Change-Id: I01262027edd8ec23391cff6fb409b3009aedfbb9 Signed-off-by: jinghua <jinghua@marvell.com> Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com>
* sunxi: DT: R40: Update device tree files from Linux 5.12Ivan Uvarov2021-04-283-5/+9
| | | | | | | | | | | Update R40 .dts{,i} and dt-binding headers to current version from kernel. Files taken from Linux 5.12-rc1 release (commit fe07bfda2fb9cdef8a4d4008a409bb02f35f1bd8) Signed-off-by: Ivan Uvarov <i.uvarov@cognitivepilot.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* ARM: dts: imx8mn: Add power domain nodesMarek Vasut2021-04-181-0/+15
| | | | | | | | | | | Add power domain nodes to DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
* ARM: dts: imx8mm: Add power domain nodesMarek Vasut2021-04-181-0/+22
| | | | | | | | | | | Add power domain nodes to DT. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
* Merge tag 'u-boot-stm32-20210409' of ↵Tom Rini2021-04-091-0/+2
|\ | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-stm Add rt-thread art-pi board support based on STM32H750 SoC Add Engicam i.Core STM32MP1 SoM Add FIP header support for STM32programmer Update uart number when no serial device found for STM32MP1 Remove board_check_usb_power function when ADC flag is not set Update SPL size limitation for STM32MP1 Set soc_type, soc_pkg, soc_rev env variables for STM32MP1
| * ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6dillon min2021-04-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patchset has following changes: - introduce stm32h750.dtsi to support stm32h750 value line - add pin groups for usart3/uart4/spi1/sdmmc2 - add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile) - add stm32h750i-art-pi.dts to support art-pi board - add stm32h750i-art-pi-u-boot.dtsi to support art-pi board (u-boot) art-pi board component: - 8MiB qspi flash - 16MiB spi flash - 32MiB sdram - ap6212 wifi&bt&fm the detail board information can be found at: https://art-pi.gitee.io/website/ Signed-off-by: dillon min <dillon.minfei@gmail.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
* | dt-bindings: add tda1997x and bindingsTim Harvey2021-04-081-0/+74
| | | | | | | | | | | | Add td1997x header from Linux to be included by dts files. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | Merge tag 'rockchip-for-v2021.07' of ↵Tom Rini2021-04-051-17/+14
|\ \ | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-rockchip - Fix rk3368 lion board support; - Fix px30 odroid-go2 board support; - Add rk3399 NanoPi R4s and NanoPi M4B board support;
| * | rockchip: rk3368: sync clock dt-binding header from LinuxHeiko Stuebner2021-03-301-17/+14
| | | | | | | | | | | | | | | | | | | | | This is the state as of v5.10 in Linux. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | | Merge tag 'xilinx-for-v2021.07' of ↵Tom Rini2021-03-311-0/+16
|\ \ \ | |/ / |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://source.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.07 net: - Fix gem PCS support spi: - Small trivial fixes zynq: - Enable time/timer commands - Update bitmain platform - Several DT changes zynqmp: - Update clock driver - mini config alignments - Add/update psu_init for zcu208/zcu216/zc1275 - Several DT changes - Enable efi debug command (also for Versal)
| * | xilinx: Sync DTs with Linux kernelMichal Simek2021-03-301-0/+16
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are several changes which happen in mainline kernel which should get also to U-Boot. Here is the list of patches from the kernel: - ARM: zynq: Fix leds subnode name for zc702/zybo-z7 - arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1 - arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111 - arm64: dts: zynqmp: Wire up the DisplayPort subsystem - arm64: dts: zynqmp: Add DisplayPort subsystem - arm64: dts: zynqmp: Add DPDMA node - arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 - arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111 - arm64: dts: zynqmp: Add DT description for si5328 for zcu102/zcu106 - arm64: dts: zynqmp-zcu100-revC: correct interrupt flags - arm64: dts: xilinx: align GPIO hog names with dtschema - arm64: zynqmp: Add Xilinx AES node - dt: bindings: dma: xilinx: dpdma: DT bindings for Xilinx DPDMA but also some other changes have been done. - Using only one compatible string for adxl345 on zturn - Remove Xilinx internal DP bindings - Remove USB3.0 serdes configurations - Remove SATA serdes configuration for zc1232 - Resort nvmem_firmware - Update nand compatible string - Aling power-domains property for sd0/1 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* / arm: rmobile: Add Silicon Linux EK874 board supportLad Prabhakar2021-03-161-0/+8
|/ | | | | | | | | | | | | | | The EK874 development kit from Silicon Linux is made of CAT874 (the main board) and CAT875 (the sub board that goes on top of CAT874). This patch adds the required board support to boot Si-Linux EK874 board based on R8A774C0 SoC. DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi have been imported from Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* dt-bindings: Sync versaclock.h with upcoming 5.12-rc1Adam Ford2021-02-071-0/+13
| | | | | | | | | The versaclock doesn't have a driver yet, but there are a bunch of device tree updates for the Beacon RZ/G2 boards that won't compile without these. A driver is coming, so sync the bindings for now Signed-off-by: Adam Ford <aford173@gmail.com>
* arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-BootLokesh Vutla2021-02-041-0/+93
| | | | | | | | | Sync all J721e related v5.11-rc6 Linux kernel dts into U-Boot. HBMC nodes are not yet added in Linux kernel yet but were added in U-Boot. In order to avoid any regressions, hbmc nodes are kept intact. These will be added in kernel in future. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2021-01-254-0/+188
|\ | | | | | | | | | | | | | | - New Allwinner H616 SoC support (sans Ethernet & USB) - H6 DT update - Tanix TX6 TV box support - OrangePi 3 support - OrangePi Zero2 (H616) support
| * arm: sunxi: add initial H616 DTSI and headersJernej Skrabec2021-01-254-0/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces H616 DTSI file and dt-bindings headers needed for device tree files. Files are taken from v3 Linux H616 support submission[1], as the H616 .dtsi file is not merged upstream yet. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2021-January/632082.html Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
* | Merge tag 'mips-pull-2021-01-24' of ↵Tom Rini2021-01-252-0/+75
|\ \ | |/ |/| | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-mips - MIPS: add support for Mediatek MT7620 SoCs
| * reset: mtmips: add reset controller support for MediaTek MT7620 SoCWeijie Gao2021-01-241-0/+35
| | | | | | | | | | | | | | | | This patch adds reset controller bits definition header file for MediaTek MT7620 SoC Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
| * clk: add clock driver for MediaTek MT7620 SoCWeijie Gao2021-01-241-0/+40
| | | | | | | | | | | | | | | | | | This patch adds a clock driver for MediaTek MT7620 SoC. This driver provides clock gate control as well as getting clock frequency for CPU/SYS/XTAL and some peripherals. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* | Merge tag 'u-boot-imx-20210125' of ↵Tom Rini2021-01-253-7/+149
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx Changes for 2020.04 ------------------- - new board: Phytec phyCORE-i.MX8MP i.MX8MN Beacon EmbeddedWorks devkit - Fixes: several nanbcb fixes fix for imx8mm_beacon - further switch to distro boot commands - DM: DM Ether for MX6UL CI: https://gitlab.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6013
| * | arm: dts: imx8mq: sync dts from Linux KernelPeng Fan2021-01-231-1/+30
| | | | | | | | | | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: dts: imx8mp: sync dts from Linux KernelPeng Fan2021-01-231-3/+92
| | | | | | | | | | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * | arm: dts: imx8mn: sync dts from Linux KernelPeng Fan2021-01-231-3/+27
| |/ | | | | | | | | | | | | Sync dts from Linux Kernel commit f838f8d2b694cf9d524dc("mfd: ab8500-debugfs: Remove extraneous seq_putc") Signed-off-by: Peng Fan <peng.fan@nxp.com>
* | Merge tag 'u-boot-atmel-2021.04-b' of ↵Tom Rini2021-01-251-2/+5
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-atmel Second set of u-boot-atmel features for 2021.04 cycle This feature set includes macb updates for all interfaces and new sama7g5 variant support; micrel ksz9031 DLL support; a new board from Giant based on Adafruit feather form factor which contains a SAMA5D27 SoC; several fixes regarding the NAND flash PMECC block; and pincontrol drive strength support for pio4 controller.
| * pinctrl: at91-pio4: implement drive strength supportEugen Hristev2021-01-221-0/+4
| | | | | | | | | | | | | | Implement drive strength support, by preserving the same bindings as in Linux. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
| * dt-bindings: pinctrl: at91-pio4: update license to SPDX styleEugen Hristev2021-01-221-2/+1
| | | | | | | | | | | | Update license header to SPDX style Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
* | reset: aspeed: Add AST2600 reset supportChia-Wei, Wang2021-01-181-0/+70
| | | | | | | | | | | | | | | | Add controller reset support through the System Control Unit (SCU) of AST2600 SoC. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
* | clk: aspeed: Add AST2600 clock supportRyan Chen2021-01-181-0/+62
| | | | | | | | | | | | | | | | This patch adds the clock control driver for the AST2600 SoC. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
* | clk: mediatek: Add MT8183 clock driverFabien Parent2021-01-181-0/+329
|/ | | | | | | Add the topckgen, apmixedsys and infracfg clock driver for the MT8183 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com>
* clk: Add Microchip PolarFire SoC clock driverPadmarao Begari2021-01-181-0/+45
| | | | | | | | | Add clock driver code for the Microchip PolarFire SoC. This driver handles reset and clock control of the Microchip PolarFire SoC device. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Bin Meng <bin.meng@windriver.com>
* Merge tag 'u-boot-amlogic-20210112' of ↵Tom Rini2021-01-132-0/+27
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - sync amlogic GX & AXG DT to Linux 5.10 - Add new MESON_EE driver support for GXBB & AXG - Add support for Libretech-CC v2, Wetek Core2, Beelink GT-King/Pro boards - add driver for TDO tl070wsh30 panel driver - meson: isolate loading of socinfo - Add soc_rev to environment - Enable G12A support for saradc - Add correct mmcdev on VIM3(L) & Odroid-N2(C4) - Read MAC from fuses for VIM3 & VIM3L boards
| * ARM: dts: sync Amlogic GX & AXG from Linux 5.10-rc1Neil Armstrong2021-01-112-0/+27
| | | | | | | | | | | | Synced from Linux commit 3650b228f83a ("Linux 5.10-rc1") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | dt-bindings: bus: ti-sysc: resync with Linux 5.9-rc7Dario Binacchi2021-01-121-0/+6
|/ | | | | | | | | | | | | | Add support for PRUSS SYSC type: The PRUSS module has a SYSCFG which is unique. The SYSCFG has two additional unique fields called STANDBY_INIT and SUB_MWAIT in addition to regular IDLE_MODE and STANDBY_MODE fields. Add the bindings for this new sysc type. Add support for MCAN on dra76x: The dra76x MCAN generic interconnect module has a its own format for the bits in the control registers. Signed-off-by: Dario Binacchi <dariobin@libero.it>
* imx: imx8mm: Update clock bindings headerAdam Ford2020-12-261-1/+27
| | | | | | | Import clock bindings header file from Linux 5.10-rc6 Signed-off-by: Adam Ford <aford173@gmail.com> Acked-by: Peng Fan <peng.fan@nxp.com>
* reset: stm32: Add support of MCU HOLD BOOTPatrick Delaunay2020-11-251-0/+1
| | | | | | | | | | | | | | | Handle the register RCC_MP_GCR without SET/CLR registers but with a direct access to bit BOOT_MCU: - deassert => set the bit: The MCU will not be in HOLD_BOOT - assert => clear the bit: The MCU will be set in HOLD_BOOT With this patch the RCC driver handles the MCU_HOLD_BOOT_R value added in binding stm32mp1-resets.h Cc: Fabien DESSENNE <fabien.dessenne@st.com> Cc: Arnaud POULIQUEN <arnaud.pouliquen@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
* sunxi: DT: A64: update device tree filesSamuel Holland2020-11-173-1/+7
| | | | | | | | | | | | | Import updated device trees from Linux tag v5.9. This picks up new hardware (PinePhone, PineTab); and it drops the U-Boot specific DTSI files for the Pinebook and the Teres-I, since the ANX6345 bridge is now supported upstream. A couple of headers needed updates for recently-added hardware support. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
* Merge tag 'xilinx-for-v2021.01-v2' of ↵Tom Rini2020-10-292-0/+165
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x
| * dt-bindings: arm64: versal: Add clk and power headersMichal Simek2020-10-272-0/+165
| | | | | | | | | | | | Add power and reset headers to be sources by Versal dtses. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | drivers: Add a new framework for multiplexer devicesJean-Jacques Hiblot2020-10-281-0/+17
|/ | | | | | | | | | | | Add a new subsystem that handles multiplexer controllers. The API is the same as in Linux. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> [trini: Update some error calls to use different functions or pass correct arguments] Signed-off-by: Tom Rini <trini@konsulko.com>
* reset: ast2500: Use SCU for reset controlChia-Wei, Wang2020-10-221-34/+39
| | | | | | | | | | | | | | | The System Control Unit (SCU) controller of Aspeed SoCs provides the reset control for each peripheral. This patch refactors the reset method to leverage the SCU reset control. Thus the driver dependency on watchdog including dedicated WDT API and reset flag encoding can be eliminated. The Kconfig description is also updated accordingly. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
* arm: dts: r8a774c0: Import DTS from Linux 5.9Lad Prabhakar2020-10-202-0/+86
| | | | | | | | Import R8A774C0 (RZ/G2E) SoC DTSI and headers from Linux 5.9 commit bbf5c979011a ("Linux 5.9"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* pinctrl: Add support for Kendryte K210 FPIOASean Anderson2020-10-081-0/+277
| | | | | | | | | | | The Fully-Programmable Input/Output Array (FPIOA) device controls pin multiplexing on the K210. The FPIOA can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. However, GPIO functionality remains largely unimplemented (in favor of the dedicated GPIO peripherals). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* test: pinmux: Add test for pin muxingSean Anderson2020-10-081-0/+19
| | | | | | | | | | | | | | | | | This extends the pinctrl-sandbox driver to support pin muxing, and adds a test for that behaviour. The test is done in C and not python (like the existing tests for the pinctrl uclass) because it needs to call pinctrl_select_state. Another option could be to add a command that invokes pinctrl_select_state and then test everything in test/py/tests/test_pinmux.py. The pinctrl-sandbox driver now mimics the way that many pinmux devices work. There are two groups of pins which are muxed together, as well as four pins which are muxed individually. I have tried to test all normal paths. However, very few error cases are explicitly checked for. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge tag 'u-boot-amlogic-20201005' of ↵Tom Rini2020-10-064-1/+31
|\ | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - generate unique mac address from SoC serial on S400 board - Add USB support for GXL and AXG SoCs - Update Gadget code to use the new GXL and AXG USB glue driver - Add a VIM3 board support to add dynamic PCIe enable in OS DT - Fix AXG pinmux with requesting GPIOs - Add missing GPIOA_18 for AXG pinctrl - Add Amlogic PWM driver
generated by cgit (git 2.34.1) at 2025-08-30 12:17:18 +0000