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* | | drivers: qe: avoid double free()Heinrich Schuchardt2021-01-181-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | Avoid calling free(addr) twice if the device for ucode is not found. The problem was indicated by cppcheck. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | mmc: fsl_esdhc_spl: remove superfluous free()Heinrich Schuchardt2021-01-181-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | Freeing a buffer before calling hang() is superfluous. Removing the call reduces the SPL size. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* | | dma: bcm6348: incorrect buffer allocationHeinrich Schuchardt2021-01-181-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calling calloc() for 0 members does not make any sense. Setting ch_priv->busy_desc = NULL for ch_priv->desc_cnt > 0 is equally unreasonable. The current code will lead to a NULL dereference in bcm6348_iudma_enable(). The assignments for ch_priv->busy_desc are obviously swapped. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* | | power: pmic: add driver for Monolithic Power mp5416Tim Harvey2021-01-183-0/+114
| | | | | | | | | | | | | | | | | | | | | | | | This adds basic register access and child regulator binding for the Monolithic MP5416 Power Management IC which integrates four DC/DC switching converters and five LDO regulators. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
* | | aspeed: Add AST2600 platform supportChia-Wei, Wang2021-01-181-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add low level platform initialization for the AST2600 SoC. The 2-stage booting with U-Boot SPL are leveraged to support different booting mode. However, currently the patch supports only the booting from memory-mapped SPI flash. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
* | | reset: aspeed: Add AST2600 reset supportChia-Wei, Wang2021-01-183-0/+118
| | | | | | | | | | | | | | | | | | | | | | | | Add controller reset support through the System Control Unit (SCU) of AST2600 SoC. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
* | | wdt: aspeed: Add AST2600 watchdog supportChia-Wei, Wang2021-01-183-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AST2600 has 8 watchdog timers including 8 sets of 32-bit decrement counters, based on 1MHz clock. A 64-bit reset mask is also supported to specify which controllers should be reset by the WDT reset. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
* | | ram: aspeed: Add AST2600 DRAM control supportDylan Hung2021-01-183-2/+1123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | AST2600 supports DDR4 SDRAM with maximum speed DDR4-1600. The DDR4 DRAM types including 128MbX16 (2Gb), 256MbX16 (4Gb), 512MbX16 (8Gb), 1GbX16 (16Gb), and 1GbX8 TwinDie (16Gb) are supported. Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
* | | clk: aspeed: Add AST2600 clock supportRyan Chen2021-01-182-0/+1174
| | | | | | | | | | | | | | | | | | | | | | | | This patch adds the clock control driver for the AST2600 SoC. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com>
* | | mtd: rawnand: cortina_nand: Add Cortina CAxxxx SoC supportKate Liu2021-01-184-0/+1696
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Cortina Access parallel Nand support for CAxxxx SOCs Signed-off-by: Kate Liu <kate.liu@cortina-access.com> Signed-off-by: Alex Nemirovsky <alex.nemirovsky@cortina-access.com> CC: Tom Rini <trini@konsulko.com> CC: Scott Wood <oss@buserror.net> Reviewed-by: Tom Rini <trini@konsulko.com>
* | | mmc: Only retrieve cd pin when GPIO is enabledHarm Berntsen2021-01-181-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | The driver only needs to retrieve the pin for the ACPI info. The driver itself works without depending on GPIO. Signed-off-by: Harm Berntsen <harm.berntsen@nedap.com> CC: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | clk: mediatek: Add MT8183 clock driverFabien Parent2021-01-182-0/+824
| |/ |/| | | | | | | | | | | Add the topckgen, apmixedsys and infracfg clock driver for the MT8183 SoC. Signed-off-by: Fabien Parent <fparent@baylibre.com>
* | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-shTom Rini2021-01-181-5/+72
|\ \ | | | | | | | | | - R-Car pinctrl updates
| * | pinctrl: renesas: Implement get_pin_muxing() callbackLad Prabhakar2021-01-181-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | Implement get_pin_muxing() callback so that pinmux status command can be used on Renesas platforms. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
| * | pinctrl: renesas: Make sure the pin type is updated after setting the MUXLad Prabhakar2021-01-181-5/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default on startup all the pin types are configured to PINMUX_TYPE_NONE (in sh_pfc_map_pins()), when pin is set as GPIO the pin type is updated to PINMUX_TYPE_GPIO. But the type is not updated when the pin is set as a function in sh_pfc_pinctrl_pin_set() or sh_pfc_pinctrl_group_set() calls (these calls only set the MUX if the pin type is PINMUX_TYPE_NONE ie unused). So with the current implementation pin functionality could be overwritten silently, for example if the same pin is added for SPI and serial. This patch makes sure of updating pin type after every successful call to sh_pfc_config_mux() and thus fixing from pin functionality to be overwritten. Also a warning message is printed if the current pin is being overwritten before abort. This also avoids pin re-muxing to same type that is for example from command line device is asked to re-probe/select (mmc dev x) we return early with success in this case as the pin is already muxed. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
* | | Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscvTom Rini2021-01-1813-20/+707
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Update qemu-riscv.rst build instructions. - Add support for SPI on Kendryte K210. - Add Microchip PolarFire SoC Icicle Kit support. - Add support for an early timer. - Select TIMER_EARLY to avoid infinite recursion for Trace.
| * | | clk: Add Microchip PolarFire SoC clock driverPadmarao Begari2021-01-188-0/+514
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add clock driver code for the Microchip PolarFire SoC. This driver handles reset and clock control of the Microchip PolarFire SoC device. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Bin Meng <bin.meng@windriver.com>
| * | | net: macb: Add phy address to read it from device treePadmarao Begari2021-01-181-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read phy address from device tree and use it to find the phy device if not found then search in the range of 0 to 31. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
| * | | net: macb: Add DMA 64-bit address support for macbPadmarao Begari2021-01-182-17/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable 32-bit or 64-bit DMA in the macb driver based on the macb hardware compatibility and it is configured with structure macb_config in the driver. The Microchip PolarFire SoC Memory Protection Unit(MPU) gives the 64-bit DMA access with the GEM, the MPU transactions on the AXI bus is 64-bit not 32-bit So 64-bit DMA is enabled for the Microchip PolarFire SoC GEM. Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Tested-by: Bin Meng <bin.meng@windriver.com>
| * | | riscv: timer: Add support for an early timerPragnesh Patel2021-01-183-3/+60
| |/ / | | | | | | | | | | | | | | | | | | | | | Added support for timer_early_get_count() and timer_early_get_rate() This is mostly useful in tracing. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
* | | ram: k3-j721e: rename BIT_MASK()Heinrich Schuchardt2021-01-162-15/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The macro BIT_MASK is already defined in include/linux/bitops.h. To avoid name collisions rename BIT_MASK() in drivers/ram/k3-j721e/lpddr4_private.h to LPDDR4_BIT_MASK(). Remove superfluous parantheses. Remove superfluous comparison to 0. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | mtd: misplaced log.h and dm/devres.hHeinrich Schuchardt2021-01-161-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | log.h and dm/devres.h are U-Boot includes. So placing them behind #ifndef __UBOOT__ does not make any sense. Fixes: f7ae49fc4f36 ("common: Drop log.h from common header") Fixes: 61b29b826838 ("dm: core: Require users of devres to include the header") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | drivers: serial: probe all uart devicesVabhav Sharma2021-01-162-0/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot DM model probe only single device at a time which is enabled and configured using device tree or platform data method. PL011 UART IP is SBSA compliant and firmware does the serial port set-up, initialization and let the kernel use UART port for sending and receiving characters. Normally software talk to one serial port time but some LayerScape platform require all the UART devices enabled in Linux for various use case. Adding support to probe all enabled serial devices like SBSA compliant PL011 UART ports probe and initialization by firmware. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
* | | dm: core: add function uclass_probe_all() to probe all devicesVabhav Sharma2021-01-161-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support a common method to probe all devices associated with uclass. This includes data structures and code for finding the first device and looping for remaining devices associated with uclasses (groups of devices with the same purpose, e.g. all SERIAL ports will be in the same uclass). An example is SBSA compliant PL011 UART IP, where firmware does the serial port initialization and prepare uart device to let the kernel use it for sending and reveiving the characters.SERIAL uclass will use this function to initialize PL011 UART ports. The feature is enabled with CONFIG_DM. Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Sean Anderson <seanga2@gmail.com>
* | | power: regulator: Kconfig: add a dependency for POWER_SUPPORT for SPLNishanth Menon2021-01-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | power/regulator will not be built if just CONFIG_SPL_DM_REGULATOR is enabled. It needs CONFIG_SPL_POWER_SUPPORT to be enabled as well. For example, if we just need a GPIO regulator in SPL: CONFIG_DM_REGULATOR=y CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_DM_REGULATOR_GPIO=y Will not suffice, since the entire regulator build for SPL depends on CONFIG_SPL_POWER_SUPPORT. Elaborate that information in the Kconfig dependency. Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* | | Kconfig: simple panel requires backlightMarcin Juszkiewicz2021-01-161-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | | | During build of simple panel driver backlight is needed so let's enable it: aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_set_backlight': u-boot/drivers/video/simple_panel.c:43: undefined reference to `backlight_set_brightness' aarch64-linux-gnu-ld.bfd: drivers/built-in.o: in function `simple_panel_enable_backlight': u-boot/drivers/video/simple_panel.c:28: undefined reference to `backlight_enable' Signed-off-by: Marcin Juszkiewicz <marcin@juszkiewicz.com.pl>
* | disk: dos: rename write_mbr_partition to write_mbr_sectorMarek Szyprowski2021-01-151-1/+1
| | | | | | | | | | | | | | | | write_mbr_partition() function name is a bit misleading, so rename it to write_mbr_sector(). This is a preparation for adding code for writing a complete MBR partition layout. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
* | common: board_r: Drop initr_bbmii wrapperOvidiu Panait2021-01-151-1/+3
| | | | | | | | | | | | | | | | Add a return value to bb_miiphy_init and use it directly in the post-relocation init sequence, rather than using a wrapper stub. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | common: board_r: Drop initr_xen wrapperOvidiu Panait2021-01-151-1/+3
| | | | | | | | | | | | | | | | Add a return value to xen_init and use it directly in the post-relocation init sequence, rather than using a wrapper stub. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | common: board_r: Drop initr_pci wrapperOvidiu Panait2021-01-152-3/+7
| | | | | | | | | | | | | | | | Add a return value to pci_init and use it directly in the post-relocation init sequence, rather than using a wrapper stub. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | common: board_r: Drop initr_pci_ep wrapperOvidiu Panait2021-01-151-1/+3
| | | | | | | | | | | | | | | | Add a return value to pci_ep_init and use it directly in the post-relocation init sequence, rather than using a wrapper stub. Signed-off-by: Ovidiu Panait <ovidiu.panait@windriver.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: fix build errors generated by last mergesDario Binacchi2021-01-1511-21/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Something was wrong in the merge process into the mainline. Some added patches access driver structure fields and functions that have been modified by previous patches. The patch renames: - dev_get_platdata to dev_get_plat - dev_get_uclass_platdata to dev_get_uclass_plat - ofdata_to_platdata to of_to_plat - plat_data_alloc_size to plat_auto - priv_auto_alloc_size to priv_auto - video_uc_platdata to video_uc_plat Signed-off-by: Dario Binacchi <dariobin@libero.it>
* | arm: socfpga: soc64: Add ATF support for FPGA reconfig driverChee Hong Ang2021-01-151-0/+139
| | | | | | | | | | | | | | In non-secure mode (EL2), FPGA reconfiguration driver calls the SMC/PSCI services provided by ATF to configure the FPGA. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
* | net: designware: socfpga: Add ATF support for MAC driverChee Hong Ang2021-01-151-6/+31
| | | | | | | | | | | | | | | | In non-secure mode (EL2), MAC driver calls the SMC/PSCI services provided by ATF to setup the PHY interface. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
* | mmc: dwmmc: socfpga: Add ATF support for MMC driverChee Hong Ang2021-01-151-0/+14
| | | | | | | | | | | | | | | | In non-secure mode (EL2), MMC driver calls the SMC/PSCI services provided by ATF to set SDMMC's DRVSEL and SMPLSEL. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
* | mmc: dwmmc: Change designware MMC 'clksel' callback function to return statusSiew Chin Lim2021-01-155-6/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change 'clksel' callback function to allow the code to return a status. This patch is a preparation for enabling Arm-Trusted-Firmware (ATF) in Intel SoC FPGA. This patch does not change functionality. When using Arm-Trusted-Firmware (ATF) in Intel SoC FPGA, the MMC clock related register is secure register which is required to be written via SMC/PCSI call. It is possible that U-Boot fail to write the register if there is unexpected error between U-Boot and ATF. As a result, there maybe signal integrity on MMC connection due to clock. So, the code should reports error to user when 'clksel' fail. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
* | Merge tag 'u-boot-stm32-20210113' of ↵Tom Rini2021-01-1330-447/+511
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-stm - Enable logging features for stm32mp15 boards - Update MAINTAINERS emails for STI and STM32 - Activate OF_LIVE for ST stm32mp15 boards - Switch to MCO2 for PHY 50 MHz clock for DHCOM boards - Correction in stm32prog command on uart: always flush DFU on start command - Update USB-C power detection algorithm on DK boards
| * | video: stm32_dsi: migrate trace to dev and log macroPatrick Delaunay2021-01-131-8/+10
| | | | | | | | | | | | | | | | | | | | | Change pr_* to dev_ or log_ macro and define LOG_CATEGORY. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | video: stm32_ltdc: migrate trace to dev and log macroPatrick Delaunay2021-01-131-15/+18
| | | | | | | | | | | | | | | | | | | | | Change pr_* to dev_ or log_ macro and define LOG_CATEGORY. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | serial: stm32: define LOG_CATEGORYPatrick Delaunay2021-01-131-0/+3
| | | | | | | | | | | | | | | | | | | | | Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | memory: stm32-fmc2: migrate trace to dev and log macroPatrick Delaunay2021-01-131-14/+16
| | | | | | | | | | | | | | | | | | | | | Change pr_* to dev_ or log_ macro and define LOG_CATEGORY. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | mtd: stm32_fmc2: migrate trace to dev and log macroPatrick Delaunay2021-01-131-21/+19
| | | | | | | | | | | | | | | | | | | | | Change pr_* to dev_ or log_ macro and define LOG_CATEGORY. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | spi: stm32_qspi: migrate trace to dev and log macroPatrick Delaunay2021-01-131-21/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change debug/pr_* to log_* or dev_* macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | spi: stm32_spi: migrate trace to dev and log macroPatrick Delaunay2021-01-131-14/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change debug/pr_debug to log_debug or dev_dbg macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | phy: stm32-usbphyc: migrate trace to dev and log macroPatrick Delaunay2021-01-131-8/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change pr_debug to log_debug or dev_dbg macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | i2c: stm32f7_i2c: migrate trace to dev and log macroPatrick Delaunay2021-01-131-37/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change debug to dev_dbg macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Heiko Schocher <hs@denx.de>
| * | mailbox: stm32-ipcc: migrate trace to dev and log macroPatrick Delaunay2021-01-131-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change debug to dev_dbg macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | reset: stm32-reset: migrate trace to dev and log macroPatrick Delaunay2021-01-131-4/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change debug to dev_dbg macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | clk: clk_stm32h7: migrate trace to dev and log macroPatrick Delaunay2021-01-131-32/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change debug and pr_ macro to dev macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
| * | clk: clk_stm32f: migrate trace to dev and log macroPatrick Delaunay2021-01-131-19/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change debug and pr_ macro to dev macro and define LOG_CATEGORY. Remove the "%s:" __func__ header as it is managed by dev macro (dev->name is displayed) or log macro (CONFIG_LOGF_FUNC). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
generated by cgit (git 2.34.1) at 2025-09-26 17:14:43 +0000