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path: root/drivers/ram/rockchip/sdram_rk3399.c
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* common: Drop linux/delay.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop log.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop init.h from common headerSimon Glass2020-05-181-0/+1
* arm: rockchip: Add common cru.hJagan Teki2020-01-301-5/+5
* ram: rk3399: don't assume phy_io_config() uses real regsThomas Hebb2020-01-301-4/+2
* ram: rk3399: Fix dram setting to make dram more stableYouMin Chen2019-11-171-21/+20
* ram: rk3399: update calculate_strideKever Yang2019-11-171-39/+119
* ram: rk3399: Sync the io setting from Rockchip vendor codeKever Yang2019-11-171-30/+14
* ram: rk3399: add support detect capacityYouMin Chen2019-11-171-21/+215
* ram: rk3399: update the function of sdram_initYouMin Chen2019-11-171-123/+296
* ram: rk3399: fix error about get_ddrc0_con reg addrYouMin Chen2019-11-171-1/+1
* ram: rk3399: Clean up codeYouMin Chen2019-11-171-83/+93
* ram: rk3399: migrate to use common codeYouMin Chen2019-11-171-91/+72
* ram: rockchip: rename sdram_common.c/h to sdram.cKever Yang2019-11-171-1/+1
* ram: rk3399: update cap and ddrconfig for each channel after initKever Yang2019-08-231-78/+81
* ram: rk3399: Add lpddr4 set rate supportJagan Teki2019-07-201-12/+661
* ram: rk3399: Add set_rate sdram rk3399 opsJagan Teki2019-07-211-3/+8
* ram: rk3399: Add LPPDR4 mr detectionJagan Teki2019-07-211-0/+226
* ram: rk3399: Handle data training via opsJagan Teki2019-07-211-10/+33
* ram: rk3399: Simplify data training first argumentJagan Teki2019-07-211-5/+4
* ram: rk3399: Update lpddr4 vref_mode_acJagan Teki2019-07-201-1/+2
* ram: rk3399: Update lpddr4 mode_sel based on io settingsJagan Teki2019-07-201-2/+5
* ram: rk3399: Update lpddr4 vref based on io settingsJagan Teki2019-07-201-5/+14
* ram: rk3399: Get lpddr4 tsel_rd_en from io settingsJagan Teki2019-07-201-2/+6
* ram: rk3399: Configure soc odt supportJagan Teki2019-07-201-1/+48
* ram: rk3399: Add tsel control clock driveJagan Teki2019-07-201-2/+14
* ram: sdram: Configure lpddr4 tsel rd, wr based on IO settingsJagan Teki2019-07-201-6/+36
* ram: rk3399: Add IO settingsJagan Teki2019-07-201-0/+104
* ram: rk3399: Don't disable dfi dram clk for lpddr4, rank 1Jagan Teki2019-07-201-2/+12
* ram: rk3399: Configure tsel write ca for lpddr4Jagan Teki2019-07-201-3/+12
* ram: rk3399: Map chipselect for lpddr4Jagan Teki2019-07-201-0/+10
* ram: rk3399: Configure PHY RX_CM_INPUT for lpddr4Jagan Teki2019-07-201-0/+22
* ram: rk3399: Configure SLEWP_EN, SLEWN_EN for lpddr4Jagan Teki2019-07-201-0/+21
* ram: rk3399: Configure BOOSTP_EN, BOOSTN_EN for lpddr4Jagan Teki2019-07-201-0/+24
* ram: rk3399: Configure PHY_898, PHY_919 for lpddr4Jagan Teki2019-07-201-0/+5
* ram: rk3399: Avoid two channel ZQ Cal Start at the same timeJagan Teki2019-07-201-0/+14
* ram: rk3399: Don't wait for PLL lock in lpddr4Jagan Teki2019-07-201-10/+16
* ram: rk3399: Move mode_sel assignmentJagan Teki2019-07-201-9/+3
* ram: rk3399: Add lpddr4 rank mask for wdql trainingJagan Teki2019-07-201-1/+4
* ram: rk3399: Add lpddr4 rank mask for ca trainingJagan Teki2019-07-201-1/+4
* ram: rk3399: Configure phy IO in ds odtJagan Teki2019-07-201-165/+162
* ram: rk3399: Add DdrModeJagan Teki2019-07-201-1/+1
* ram: rk3399: Add ddrtimingC0Jagan Teki2019-07-201-1/+1
* ram: rk3399: Add ddr version enc macroJagan Teki2019-07-201-0/+1
* ram: rk3399: Introduce sys_reg3 for more capacity infoJagan Teki2019-07-201-2/+7
* ram: rk3399: Rename sys_reg with sys_reg2Jagan Teki2019-07-201-13/+13
* ram: rk3399: Simply existing dram enc macroJagan Teki2019-07-201-19/+11
* ram: rk3399: Enable sdram debug functionsJagan Teki2019-07-201-0/+5
* ram: rk3399: Add rank detection supportJagan Teki2019-07-201-22/+100
* ram: rk3399: Compute stride for 1 channel aJagan Teki2019-07-191-0/+4