summaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/meson
Commit message (Collapse)AuthorAgeFilesLines
* common: Drop asm/global_data.h from common headerSimon Glass2021-02-021-0/+1
| | | | | | | | | | | | Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include <asm/global_data.h> at all, so remove that include. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'v2021.01-rc5' into nextTom Rini2021-01-051-2/+2
|\ | | | | | | | | | | Prepare v2021.01-rc5 Signed-off-by: Tom Rini <trini@konsulko.com>
| * pinctrl: meson: fix bit manipulation of pin bias configurationNeil Armstrong2020-12-141-2/+2
| | | | | | | | | | | | | | | | | | This fixes the wrong usage of clrsetbits_le32(), badly setting the set argument. Fixes: c4c726c26b ("pinctrl: meson: add pinconf support") Reported-by: Anton Arapov <arapov@gmail.com> Reported-by: Otto Meier <gf435@gmx.net> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass2020-12-134-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Drop uses of dev_set_of_offset()Simon Glass2020-12-131-1/+0
| | | | | | | | | | | | | | The need for this can be avoided by passing the correct node to the device_bind() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: Remove uses of device_bind_offset()Simon Glass2020-12-131-1/+3
| | | | | | | | | | | | | | This function is not needed since the standard device_bind() can be used instead. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: core: Rename device_bind() to device_bind_offset()Simon Glass2020-12-131-1/+1
|/ | | | | | | | | This function is not necessary anymore, since device_bind_ofnode() does the same thing and works with both flattree and livetree. Rename it to indicate that it is special. Signed-off-by: Simon Glass <sjg@chromium.org>
* pinctrl: meson-axg: add missing GPIOA_18Neil Armstrong2020-10-051-0/+1
| | | | | | Add the missing GPIOA_18 from the missing EE gpio list. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson-axg-pmx: fix gpio requestNeil Armstrong2020-10-051-1/+4
| | | | | | | | The AXG pmx driver gpio request offset needs the pin base to have the correct pin number. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-182-0/+2
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop log.h from common headerSimon Glass2020-05-183-0/+3
| | | | | | Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* common: Drop image.h from common headerSimon Glass2020-05-181-0/+1
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Create a new header file for 'compat' featuresSimon Glass2020-02-051-0/+2
| | | | | | | | | | | | At present dm/device.h includes the linux-compatible features. This requires including linux/compat.h which in turn includes a lot of headers. One of these is malloc.h which we thus end up including in every file in U-Boot. Apart from the inefficiency of this, it is problematic for sandbox which needs to use the system malloc() in some files. Move the compatibility features into a separate header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* pinctrl: meson-gxbb: add hdmi related pinsMaxime Jourdan2019-06-121-0/+19
| | | | | | | | | | | | | The GXBB pinctrl is missing pins related to HDMI, namely hot plug detection (hpd) and I2C (sda + scl). This fixes HDMI support for GXBB in u-boot. Reported-by: Mohammad Rasim <mohammad.rasim96@gmail.com> Signed-off-by: Maxime Jourdan <mjourdan@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Mohammad Rasim <mohammad.rasim96@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: g12a: add DS bank valueGuillaume La Roque2019-06-121-10/+10
| | | | | | | | add drive-strength bank regiter and bit value for G12A SoC Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: add support of drive-strength-microampGuillaume La Roque2019-06-123-14/+74
| | | | | | | | | | | drive-strength-microamp is a new feature needed for G12A SoC. the default DS setting after boot is usually 500uA and it is not enough for many functions. We need to be able to set the drive strength to reliably enable things like MMC, I2C, etc ... Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson-axg: add support for getting pinmux statusNeil Armstrong2019-06-121-0/+48
| | | | | | | | In order to support the "pinmux status" command, use the common functions to get the pins count and names, and add the AXG specific function to get the current function from registers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson-gx: add support for getting pinmux statusNeil Armstrong2019-06-121-0/+44
| | | | | | | | | In order to support the "pinmux status" command, use the common functions to get the pins count and names, and add the GX specific function to get the current function from registers. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Maxime Jourdan <mjourdan@baylibre.com>
* pinctrl: meson: add common function to get pins nameNeil Armstrong2019-06-122-0/+27
| | | | | | | In order to support the "pinmux status" command, add common function to get pins count and pin name. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson-gx: fix GPIO_TEST_N and GPIOCLK_ groupsNeil Armstrong2019-06-122-4/+9
| | | | | | | | The GPIO_TEST_N was in the wrong pmx group table, move it back with the AO groups, GPIODV_18 was missing, add it back, and finally the GPIOCLK_* group names were missing. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: add g12a supportJerome Brunet2019-04-235-5/+1312
| | | | | | | | | Add pinctrl support for the Amlogic G12A SoC, which is very similar to the Amlogic AXG support but with an additionnal drive-strength register bank. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: axg: Fix PIN and BANK offsetsGuillaume La Roque2019-04-101-179/+179
| | | | | | | | | | | Periphs bank offset must be applied on all pins and PMX bank to prevent issue in meson_pinconf_set call. Without offset on pins when a call to pinconf is done meson_gpio_calc_reg_and_bit return wrong offset. To avoid breaking pmx function offset is needed in pmx bank structure too. Signed-off-by: Guillaume La Roque <glaroque@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: add pinconf supportJerome Brunet2019-01-295-7/+123
| | | | | | | | | | | | Adding pinconf support is necessary to enable boot from SPI without breaking the eMMC. When booting from SPI, the ROM code leave pull downs on the eMMC pad. We need to set pinconf provided in DT to solve this Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [narmstrong: added missing comma in pinctrl-meson-axg-pmx.c]
* pinctrl: meson: axg: Fix GPIO pin offsetsCarlo Caione2018-12-071-11/+11
| | | | | | | | | | | The pin number (first and last) in the bank definition is missing the pin base offset shifting. This is causing a miscalculation when retrieving the register and pin offsets in the GPIO driver causing the 'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip (the AO bank is driven correctly because the shifting is already 0). Signed-off-by: Carlo Caione <ccaione@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: Fix GPIO direction registers accessCarlo Caione2018-12-051-2/+2
| | | | | | | | | | | | The macros used to set the direction of the GPIO pins are misused, resulting in a wrong behavior when trying to read the GPIO input level from U-Boot. A better macro is also used when setting the output direction. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Reviewed-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: add axg supportJerome Brunet2018-11-265-0/+1180
| | | | | | | | This adds support for the Amlogic AXG SoC pinctrl and GPIO controller using a specific set of pinctrl functions which differs from the GX SoCs. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: select generic pinctrlJerome Brunet2018-11-261-1/+1
| | | | | | | | Meson pinctrl needs generic pinctrl, rather than depending on it select it Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: rework gx pmx functionJerome Brunet2018-11-268-121/+191
| | | | | | | | | In preparation of supporting the new Amlogix AGX SoCs, we need to move the Amlogic GX pinmux functions out of the common code to be able to add a different set of SoC specific pinmux functions for AXG. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* pinctrl: meson: Update pinmux with new Linux bindingsNeil Armstrong2018-05-082-13/+13
| | | | | | | The pinctrl bindings has changed for Amlogic Meson SoCs since Linux 4.13, update the pinctrl driver to take this in account. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-075-11/+5
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* pinctrl: meson: Add GXL SupportNeil Armstrong2017-11-173-0/+741
| | | | | | | | Add the Amlogic Meson GXL pinctrl support based on the GXBB driver and the synchronized DTS from Linux 4.13.5 Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Beniamino Galvani <b.galvani@gmail.com>
* pinctrl: meson: add GPIO supportBeniamino Galvani2017-07-263-2/+249
| | | | | | | | This commit adds GPIO support to the Amlogic Meson pin controller driver, based on code from Linux kernel. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
* dm: Fix up inclusion of common.hSimon Glass2017-06-011-0/+1
| | | | | | | | | | | | | | It is good practice to include common.h as the first header. This ensures that required features like the DECLARE_GLOBAL_DATA_PTR macro, configuration options and common types are available. Fix up some files which currently don't do this. This is necessary because driver model will soon start using global data and configuration in the dm/read.h header file, included via dm.h. The gd->fdt_blob value will be used to access the device tree and CONFIG options will be used to determine whether to support inline functions in the header file. Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: Use dm.h header when driver mode is usedSimon Glass2017-06-012-2/+2
| | | | | | | | This header includes things that are needed to make driver build. Adjust existing users to include that always, even if other dm/ includes are present Signed-off-by: Simon Glass <sjg@chromium.org>
* dm: core: Replace of_offset with accessorSimon Glass2017-02-081-3/+3
| | | | | | | | | At present devices use a simple integer offset to record the device tree node associated with the device. In preparation for supporting a live device tree, which uses a node pointer instead, refactor existing code to access this field through an inline function. Signed-off-by: Simon Glass <sjg@chromium.org>
* libfdt: Sync fdt_for_each_subnode() with upstreamSimon Glass2016-10-131-1/+1
| | | | | | | | | | | The signature for this macro has changed. Bring in the upstream version and adjust U-Boot's usages to suit. Signed-off-by: Simon Glass <sjg@chromium.org> Update to drivers/power/pmic/palmas.c: Signed-off-by: Keerthy <j-keerthy@ti.com> Change-Id: I6cc9021339bfe686f9df21d61a1095ca2b3776e8
* libfdt: Bring in upstream stringlist functionsSimon Glass2016-10-131-1/+1
| | | | | | | | | | | | | | These have now landed upstream. The naming is different and in one case the function signature has changed. Update the code to match. This applies the following upstream commits by Thierry Reding <treding@nvidia.com> : 604e61e fdt: Add functions to retrieve strings 8702bd1 fdt: Add a function to get the index of a string 2218387 fdt: Add a function to count strings Signed-off-by: Simon Glass <sjg@chromium.org>
* pinctrl: add driver for meson-gxbb pin controllerBeniamino Galvani2016-09-065-0/+702
Add a pin controller driver for Meson GXBB adapted from Linux kernel. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2025-09-03 22:33:55 +0000