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path: root/drivers/phy/Kconfig
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* phy: Add Amlogic AXG MIPI PCIe Analog PHY driverNeil Armstrong2021-02-101-0/+9
| | | | | | | | The Amlogic AXG MIPI + PCIe Analog PHY provides function for both PCIe and MIPI DSI at the same time, and provides the Analog part of MIPI DSI transmission and Analog part of the PCIe lines. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* phy: Add Amlogic AXG MIPI D-PHY driverNeil Armstrong2021-02-101-0/+9
| | | | | | | | | | The Amlogic AXG SoCs embeds a MIPI D-PHY used to communicate with DSI panels. This D-PHY depends on a separate analog PHY. Signed-off-by:Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* phy: dphy: Add configuration helpersNeil Armstrong2021-02-101-0/+5
| | | | | | | | | | | The MIPI D-PHY spec defines default values and boundaries for most of the parameters it defines. Introduce helpers to help drivers get meaningful values based on their current parameters, and validate the boundaries of these parameters if needed. These helpers and header are taken from Linux commit 9123e3a74ec7 ("Linux 5.9-rc1"). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* phy: add USB PHY driver for MediaTek MT7620 SoCWeijie Gao2021-01-241-0/+7
| | | | | | | This patch adds USB PHY driver for MediaTek MT7620 SoC Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* Merge tag 'u-boot-amlogic-20201005' of ↵Tom Rini2020-10-061-1/+1
|\ | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - generate unique mac address from SoC serial on S400 board - Add USB support for GXL and AXG SoCs - Update Gadget code to use the new GXL and AXG USB glue driver - Add a VIM3 board support to add dynamic PCIe enable in OS DT - Fix AXG pinmux with requesting GPIOs - Add missing GPIOA_18 for AXG pinctrl - Add Amlogic PWM driver
| * phy: meson-gxl-usb: depend on Meson AXG aswellNeil Armstrong2020-10-051-1/+1
| | | | | | | | | | | | Enable build of meson-gxl-usb PHY for the AXG architecture aswell. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* | phy: add support for stingray PAXB PHY controllerSrinath Mannam2020-09-301-0/+7
| | | | | | | | | | | | | | | | | | Add support for stingray PAXB PHY controller driver. This driver supports maximum 8 PAXB phys using pipemux data. Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Reviewed-by: Stefan Roese <sr@denx.de>
* | phy: add driver for Qualcomm IPQ40xx USB PHYRobert Marko2020-09-181-0/+6
|/ | | | | | | | Add a driver to setup the USB PHY-s on Qualcomm IPQ40xx series SoCs. The driver sets up HS and SS phys. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
* phy: rockchip: Add Rockchip USB2PHY driverJagan Teki2020-05-291-0/+1
| | | | | | | | | | | | | | Add Rockchip USB2PHY driver with initial support. This will help to use it for EHCI controller in host mode, and USB 3.0 controller in otg mode. More functionality like charge, vbus detection will add it in future changes. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* phy: meson: add GXBB PHY driverBeniamino Galvani2020-04-281-0/+8
| | | | | | | | This adds support for the USB PHY found on Amlogic GXBB SoCs. Signed-off-by: Beniamino Galvani <b.galvani@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* phy: mt76x8-usb-phy: add slew rate calibration and remove non-mt7628 partWeijie Gao2019-10-251-0/+1
| | | | | | | | This patch adds slew rate calibration for mt76x8-usb-phy, removes code which belongs to mt7620, and gets rid of using syscon and regmap by using clock driver and reset controller. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
* phy: mediatek: add MediaTek T-PHY support for PCIeRyder Lee2019-10-111-0/+11
| | | | | | | | | | | | The driver provides PHY for USB2, USB3.0, PCIe and SATA, and now we just enable PCIe. As for the other functionalities will be added gradually in upcoming days. This is adapted from the Linux version. Tested-by: Frank Wunderlich <frank-w@public-files.de> Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
* Kconfig: Varios: Fix more SPL, TPL dependenciesAdam Ford2019-08-261-1/+1
| | | | | | | | | | | | | | | Several options are presenting themselves on a various boards where the options are clearly not used. (ie, SPL/TPL options when SPL or TPL are not defined) This patch is not attempting to be a complete list of items, but more like low hanging fruit. In some instances, I wasn't sure of DM was required, so I simply made them SPL or TPL. This patch attempts to reduce some of the menuconfig noise by defining dependencies so they don't appear when not used. Signed-off-by: Adam Ford <aford173@gmail.com>
* phy: add support for AM654x SERDESSekhar Nori2019-08-121-0/+9
| | | | | | | | | | | | | | | | | | | | Add a new SERDES driver for TI's AM654x SoC which configures the SERDES only for PCIe. Support fo USB3 can be added later. SERDES in am654x has three input clocks (left input, external reference clock and right input) and two output clocks (left output and right output) in addition to a PLL mux clock which the SERDES uses for Clock Multiplier Unit (CMU refclock). The PLL mux clock can select from one of the three input clocks. The right output can select between left input and external reference clock while the left output can select between the right input and external reference clock. The driver has support to select PLL mux and left/right output mux as specified in device tree. Signed-off-by: Sekhar Nori <nsekhar@ti.com>
* phy: Add support for phy-da8xx-usbAdam Ford2019-08-081-0/+6
| | | | | | | In preparation for supporting the musb driver, this patch adds support for the usb phy associated with the musb driver. Signed-off-by: Adam Ford <aford173@gmail.com>
* phy: meson: add Amlogic G12A USB2 and USB3+PCIE PHY driversNeil Armstrong2019-05-091-0/+8
| | | | | | | | | | | | | | This adds support for the USB PHYs found in the Amlogic G12A SoC Family. The USB2 PHY supports Host and/or Peripheral mode, depending on it's position. The first PHY is only used as Host, but the second supports Dual modes defined by the USB Control Glue HW in front of the USB Controllers. The second driver supports USB3 Host mode or PCIE 2.0 mode, depending on the layout of the board. Selection is done by the #phy-cells, making the mode static and exclusive. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* phy: Add USB PHY driver for the MT76x8 (7628/7688) SoCStefan Roese2019-04-121-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | This driver is derived from this Linux driver: linux/drivers/phy/ralink/phy-ralink-usb.c The driver sets up power and host mode, but also needs to configure PHY registers for the MT7628 and MT7688. I removed the reset controller handling for the USB host and device, as it does not seem to be necessary right now. The soft reset bits for both devices are enabled by default and testing has shown (with hackish reset handling added), that USB related commands work identical with or without the reset handling. Please note that the resulting USB support is tested only very minimal. I was able to detect one of my 3 currently available USB sticks. Perhaps some further work is needed to fully support the EHCI controller integrated in the MT76x8 SoC. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* phy: Also allow MESON_GXM for MESON_GXL_USB_PHYNeil Armstrong2019-04-031-1/+1
| | | | | | | The MESON_GXL_USB_PHY is also used on the Amlogic Meson GXM SoCs. Fixes: 2960e27e38 ("phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* PHY: Add phy driver for the keystone USB PHYJean-Jacques Hiblot2018-12-141-0/+10
| | | | | Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* phy: Add a new driver for OMAP's USB2 PHYsJean-Jacques Hiblot2018-12-071-0/+9
| | | | | | This drivers supports the USB2 PHY found on omap5 and dra7 SOCs. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
* phy: rcar: Add R-Car Gen3 PHY driverMarek Vasut2018-10-031-0/+8
| | | | | | | | | Add a PHY driver for the R-Car Gen3 which allows configuring USB OTG PHY on Gen3 into host mode and toggles VBUS in case a dedicated regulator is present. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* phy: db410c: Add MSM USB PHY driverRamon Fried2018-09-301-0/+8
| | | | | | | | Add a PHY driver for the Qualcomm dragonboard 410c which allows switching on/off and resetting the phy connected to the EHCI controllers and USBHS controller. Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
* phy: rcar: Add R-Car Gen2 PHY driverMarek Vasut2018-08-141-0/+8
| | | | | | | | Add a PHY driver for the R-Car Gen2 which allows configuring the mux connected to the EHCI controllers and USBHS controller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* phy: add support for STM32 usb phy controllerPatrice Chotard2018-05-181-0/+13
| | | | | | | | | | | | | This patch adds phy tranceiver driver for STM32 USB PHY Controller (usbphyc) that provides dual port High-Speed phy for OTG (single port) and EHCI/OHCI host controller (two ports). One port of the phy is shared between the two USB controllers through a UTMI+ switch. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Signed-off-by: Amelie Delaunay <amelie.delaunay@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
* phy: Add Amlogic Meson USB2 & USB3 Generic PHY driversNeil Armstrong2018-04-111-0/+8
| | | | | | | | | | The Amlogic Meson GXL and GXM (simple variant) embeds up to 3 USB2 PHYs and an USB3 PHY. This patch adds drivers for these for the standard generic PHY interface and supports the power-on/off calls and set the Host mode by default. They are based on the excellent work from Martin Blumenstingl merged in linux. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
* phy: add support for bcm6318 usbh phyÁlvaro Fernández Rojas2018-03-211-0/+7
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* phy: add support for bcm6368 usbh phyÁlvaro Fernández Rojas2018-03-211-0/+6
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* phy: add support for bcm6358 usbh phyÁlvaro Fernández Rojas2018-03-211-0/+6
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* phy: add support for bcm6348 usbh phyÁlvaro Fernández Rojas2018-03-211-0/+6
| | | | | Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* usb: phy: Add STi USB2 PHYPatrice Chotard2017-09-221-0/+8
| | | | | | | | | This is the generic phy driver for the picoPHY ports used by USB2/1.1 controllers. It is found on STiH407 SoC family from STMicroelectronics. Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* phy: add a NO-OP phy driverJean-Jacques Hiblot2017-07-281-0/+18
| | | | | | | | This driver is used to stub PHY operations in a driver (USB, SATA). This is useful when the 'client' driver (USB, SATA, ...) uses the PHY framework and there is no actual PHY harwdare to drive. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
* pipe3: Fix broken dependencyJean-Jacques Hiblot2017-07-101-2/+2
| | | | | | | | ARCH_OMAP2 has been renamed ARCH_OMAP2PLUS in commit a93fbf4a7892 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig") Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* drivers: phy: add PIPE3 phy driverJean-Jacques Hiblot2017-05-091-0/+18
| | | | | | | | | | This phy is found on omap platforms with sata capabilities. Except for the part related to the DM and the PHY framework, the code is basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: test: Add tests for the generic PHY uclassJean-Jacques Hiblot2017-05-091-0/+8
| | | | | | | | | | | Those tests check: - the ability for a phy-user to get a phy based on its name or its index - the ability of a phy device (provider) to manage multiple ports - the ability to perform operations on the phy (init,deinit,on,off) - the behavior of the uclass when optional operations are not implemented Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* drivers: phy: add generic PHY frameworkJean-Jacques Hiblot2017-05-091-0/+36
The PHY framework provides a set of APIs to control a PHY. This API is derived from the linux version of the generic PHY framework. Currently the API supports init(), deinit(), power_on, power_off() and reset(). The framework provides a way to get a reference to a phy from the device-tree. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit (git 2.34.1) at 2026-01-07 11:53:27 +0000