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* dm: pci: Use a 1:1 mapping for bus <-> phy addressesChristian Gmeiner2018-06-131-0/+10
| | | | | | | | | | | | | | | | | If U-Boot gets used as coreboot payload all pci resources got assigned by coreboot. If a dts without any pci ranges gets used the dm is not able to access pci device memory. To get things working make use of a 1:1 mapping for bus <-> phy addresses. This change makes it possible to get the e1000 U-Boot driver working on a sandybridge device where U-Boot is used as coreboot payload. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed 'u-boot' in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* dm: pci: Make ranges dt property optionalChristian Gmeiner2018-06-131-13/+10
| | | | | | | | | | | | | | | If we use U-Boot as coreboot payload with a generic dts without any ranges specified we fail in pci pre_probe and our pci bus is not usable. So convert decode_regions(..) into a void function and do the simple error handling there. Signed-off-by: Christian Gmeiner <christian.gmeiner@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed 'u-boot' in the commit message and checkpatch warning] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* PCI: autoconfig: Don't allocate 64-bit addresses to 32-bit only resourcesTuomas Tynkkynen2018-05-263-5/+13
| | | | | | | | | | Currently, if we happen to allocate an address requiring 64 bits to a device only supporting 32-bit BARs, the address eventually gets silently truncated to 32 bits. Avoid this by adding a new flag to pciauto_region_allocate() to bail out in such situations. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
* PCI: Add newlines to debug prints in pci_auto_common.cTuomas Tynkkynen2018-05-261-2/+2
| | | | | | | | All of the debug output from this file is squished to one line. Fix it. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
* PCI: dm: Ignore 64-bit memory regions if CONFIG_SYS_PCI_64BIT not setTuomas Tynkkynen2018-05-261-0/+7
| | | | | | | | | | | | | | | | | Currently, qemu_arm_defconfig and qemu_arm64_defconfig only work with the 'highmem=off' parameter passed to QEMU's virt machine. The reason is that when 'highmem' is not disabled, QEMU appends 64-bit a memory resource to the PCI controller's regions property in DT in addition to the 32-bit PCI memory window in low memory. And the current DT parsing code picks the last (thus the 64-bit one) memory resource, whose address eventually gets silently truncated to 32 bits because CONFIG_SYS_PCI_64BIT is not set, which obviously causes PCI to break. Avoid this problem by ignoring memory regions whose addresses are above the 32-bit boundary when CONFIG_SYS_PCI_64BIT is not set. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Simon Glass <sjg@chromium.org>
* pci: tegra: introduce weak tegra_pcie_board_port_reset() functionMarcel Ziswiler2018-05-101-3/+14
| | | | | | | | | | | | | Introduce a weak tegra_pcie_board_port_reset() function by default calling the existing tegra_pcie_port_reset() function. Additionally add a tegra_pcie_port_index_of_port() function to retrieve the specific PCIe port index if required. This allows overriding the PCIe port reset functionality from board specific code as e.g. required for Apalis T30 and Apalis TK1. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* pci: Don't use pci_indirect when DM is activeMario Six2018-05-081-1/+1
| | | | | | | | | Declaration of indirect PCI bridges is not compatible with DM: Both define PCI operations, but in different ways. Hence, don't use indirect bridges if DM is active. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org>
* pci: intel: Add Intel FPGA PCIe controller driverLey Foon Tan2018-05-083-0/+438
| | | | | | | | Add PCIe driver for Intel FPGA PCIe IP. This driver operates the PCIe IP in rootport mode only, the EP mode is not supported. The driver is tested with the Intel e1000e NIC driver. Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-0731-63/+31
| | | | | | | | | | | | | | | | | | | | When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-274-8/+0
| | | | | | | | We have a large number of places where while we historically referenced gd in the code we no longer do, as well as cases where the code added that line "just in case" during development and never dropped it. Signed-off-by: Tom Rini <trini@konsulko.com>
* pci: video: Only print out when everything is OKBin Meng2018-04-161-3/+1
| | | | | | | | | If video initialization fails, the "Video:" output message will be mixed with the next console log. Change to print out such message only when everything is OK, which improves the boot log readability. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge git://git.denx.de/u-boot-marvellTom Rini2018-03-304-33/+759
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| * arm64: a37xx: pci: add support for aardvark pcie driverWilson Ding2018-03-303-0/+701
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch introduced the Aardvark PCIe driver based driver model. The PCIe driver is supposed to work in Root Complex mode. It only supports X1 lane width. Signed-off-by: Wilson Ding <dingwei@marvell.com> Reviewed-on: http://vgitil04.il.marvell.com:8080/38725 Reviewed-by: Victor Gu <xigu@marvell.com> Reviewed-by: Hua Jing <jinghua@marvell.com> Tested-by: Hua Jing <jinghua@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * dm: pcie: designware: add correct ATU handlingIgal Liberman2018-03-301-33/+58
| | | | | | | | | | | | | | | | | | | | | | | | Currently, ATU (address translation unit) implementation doesn't support translate addresses > 32 bits. This patch allows to configure ATU correctly for different memory accesses (memory, configuration and IO). The same approach is used in Linux Kernel. Signed-off-by: Igal Liberman <igall@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | dm: pci: Avoid setting a PCI region that has 0 sizeBin Meng2018-03-301-2/+3
| | | | | | | | | | | | | | It makes no sense to set a PCI region that has 0 size. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: pci: Check board information pointer in decode_regions()Bin Meng2018-03-301-0/+3
|/ | | | | | | | | | | | PCI enumeration may happen very early on an x86 board. The board information pointer should have been checked in decode_regions() as its space may not be allocated yet. With this commit, Intel Galileo board boots again. Fixes: 664758c ("pci: Fix decode regions for memory banks") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>Masahiro Yamada2018-03-053-3/+3
| | | | | | | | | | | | | | | | | Thomas reported U-Boot failed to build host tools if libfdt-devel package is installed because tools include libfdt headers from /usr/include/ instead of using internal ones. This commit moves the header code: include/libfdt.h -> include/linux/libfdt.h include/libfdt_env.h -> include/linux/libfdt_env.h and replaces include directives: #include <libfdt.h> -> #include <linux/libfdt.h> #include <libfdt_env.h> -> #include <linux/libfdt_env.h> Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* pci: Fix decode regions for memory banksBernhard Messerklinger2018-02-231-1/+16
| | | | | | | | Since memory banks may not be located behind each other we need to add them separately. Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com> Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
* pci: rmobile: Add RCar Gen2 PCIe controller driverMarek Vasut2018-01-273-0/+274
| | | | | | | | Add driver for the Renesas RCar PCIe controller present on Gen2 SoCs. The PCIe on Gen2 is used both to connect external PCIe peripherals as well as access the on-SoC USB EHCI controller. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
* drivers: pci: imx: fix enumeration logic errorKoen Vandeputte2018-01-121-0/+11
| | | | | | | | | | | | | | | By default, the subordinate is set equally to the secondary bus (1) when the RC boots, and does not alter afterwards. This means that theoretically, the highest bus reachable downstream is bus 1. Force the PCIe RC subordinate to 0xff, otherwise no downstream devices will be detected behind bus 1 if the booting OS does not allow enumerating a higher busnr than the subordinate value of the primary bus. Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* pci: imx: request gpio before usePeng Fan2018-01-121-0/+4
| | | | | | | | | Before use GPIO, we need to request gpio first. Free gpio after use. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefano Babic <ssbabic@denx.de>
* PCI: Drop CONFIG_TSI108_PCITuomas Tynkkynen2018-01-102-168/+0
| | | | | | | Last user of this option went away in 2015 in commit: d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support") Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
* Update Paul Burton's email addressPaul Burton2017-11-281-1/+1
| | | | | | | | | | | | MIPS is no longer a part of Imagination Technologies, and as such my @imgtec.com email address will soon cease to function. This patch updates occurrances of it with my new @mips.com email address, and adds an entry in .mailmap such that git (& tools such as get_maintainer.pl when examining history) will use the new address. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: u-boot@lists.denx.de
* dm: pci: change bus number register setting compliant with LinuxMinghuan Lian2017-11-173-4/+5
| | | | | | | | | | This patch is to change U-Boot PCI bus assignement compliant with Linux. It means each PCIe controller's bus number is 0, not the current maximum PCI bus number, when start to scan this controller. Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: mvebu: Increase size of PCIe default mappingVlaoMao2017-11-161-2/+2
| | | | | | | Increase size PCI memory mapping from 32MiB to 128MiB. Signed-off-by: VlaoMao <vlaomao@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
* drivers: pci: imx: fix imx_pcie_remove functionSven-Ola Tuecke2017-10-121-4/+4
| | | | | | | | | | | | | | | | | | We have at least a minor count of boards, that failed to re-initialize PCI express in the Linux kernel. Typical failure rate is 20% on affected boards. This is mitigated by commit 6ecbe1375671 ("drivers: pci: imx: add imx_pcie_remove function"). However, at least on some i.MX6 custom boards, when calling assert_core_reset() as part of the first-time PCIe init, read access to PCIE_PL_PFLR simply hangs. Surround this readl() with imx_pcie_fix_dabt_handler() does not help. For this reason, the forced LTSSM detection is only used on the second assert_core_reset() that is called shorly before starting the Linux kernel. Signed-off-by: Sven-Ola Tuecke <sven-ola.tuecke@numberfour.eu> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: David Müller <d.mueller@elsoft.ch>
* PCI: Add driver for a 'pci-host-ecam-generic' host controllerTuomas Tynkkynen2017-10-063-0/+152
| | | | | | | | | QEMU emulates such a device with '-machine virt,highmem=off' on ARM. The 'highmem=off' part is required for things to work as the PCI code in U-Boot doesn't seem to support 64-bit BARs. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: layerscape: Use pci_generic_mmap_{read, write}_configTuomas Tynkkynen2017-10-061-51/+17
| | | | | | | Use the new helpers to avoid boilerplate in the driver. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: xilinx: Use pci_generic_mmap_{read, write}_config()Tuomas Tynkkynen2017-10-061-46/+7
| | | | | | | | | | | | | | | Use the new helper function to avoid boilerplate in the driver. Note that this changes __raw_writel et al. to writel. AFAICT this is no problem because: - The Linux driver for the same hardware uses the non-__raw variants as well (via pci_generic_config_write()). - This driver seems to be used only on MIPS so far, where the __raw and non-__raw accessors are the same. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: Add helper for implementing memory-mapped config space accessesTuomas Tynkkynen2017-10-061-0/+58
| | | | | | | | | | This sort of pattern for implementing memory-mapped PCI config space accesses appears in U-Boot twice already, and a third user is coming up. So add helper functions to avoid code duplication, similar to how Linux has pci_generic_config_write and pci_generic_config_read. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* treewide: replace with error() with pr_err()Masahiro Yamada2017-10-042-26/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot widely uses error() as a bit noisier variant of printf(). This macro causes name conflict with the following line in include/linux/compiler-gcc.h: # define __compiletime_error(message) __attribute__((error(message))) This prevents us from using __compiletime_error(), and makes it difficult to fully sync BUILD_BUG macros with Linux. (Notice Linux's BUILD_BUG_ON_MSG is implemented by using compiletime_assert().) Let's convert error() into now treewide-available pr_err(). Done with the help of Coccinelle, excluing tools/ directory. The semantic patch I used is as follows: // <smpl> @@@@ -error +pr_err (...) // </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> [trini: Re-run Coccinelle] Signed-off-by: Tom Rini <trini@konsulko.com>
* pci: layerscape: Fixup iommu-map for LS208xABharat Bhushan2017-09-221-5/+14
| | | | | | | | | | | Commit 0aaa1a9 added support for LS208xA devices but fixing iommu-map property is missing. This patch adds support for fixing iommu-map. Signed-off-by: Bharat Bhushan <Bharat.Bhushan@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> [YS: revised commit message] Reviewed-by: York Sun <york.sun@nxp.com>
* pci: Remove unnecessary 'default n' from KconfigTuomas Tynkkynen2017-09-221-1/+0
| | | | | | | | | 'default n' is the default anyway so it doesn't need to be specified explicitly, and the rest of the file doesn't specify it either anywhere. Drop it. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: layerscape: Remove unused field 'hose' from struct ls_pcieTuomas Tynkkynen2017-09-221-1/+0
| | | | | | | This field is no longer used since the DM conversion. Drop it. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: tegra: Remove unused field 'hose' from struct tegra_pcieTuomas Tynkkynen2017-09-221-2/+0
| | | | | | | This field is no longer used since the DM conversion. Drop it. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: xilinx: Remove unused field 'hose' from struct xilinx_pcieTuomas Tynkkynen2017-09-221-2/+0
| | | | | | | | This field has never been used as the driver has been DM-based since the beginning. Drop it. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* pci: xilinx: Fix doc comments on config space accessorsTuomas Tynkkynen2017-09-221-2/+2
| | | | | | | | | These take the 'struct udevice *' as an argument, not the 'struct xilinx_pcie *` which is a local variable. Fix the comments to match the code. Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* vbe: Drop vbe_get_video_info()Bin Meng2017-08-241-41/+0
| | | | | | With DM video, this is not used any more. Drop it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
* env: Rename getenv/_f() to env_get()Simon Glass2017-08-163-5/+5
| | | | | | | | | | | We are now using an env_ prefix for environment functions. Rename these two functions for consistency. Also add function comments in common.h. Quite a few places use getenv() in a condition context, provoking a warning from checkpatch. These are fixed up in this patch also. Suggested-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Simon Glass <sjg@chromium.org>
* PCI: layerscape: Fix assigning wrong address to LS2088A pcie cfg1 spaceHou Zhiqiang2017-08-091-0/+3
| | | | | | | | | | | This bug is brought by the commit 3d8553f0a3 (pci: layerscape: add LS2088A series SoC pcie support), which only updated cfg_res.start and did not update the .end field. This causes fdt_resource_size() getting wrong value when calculate the cfg1 space address. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> [YS: Revise subject and commit message] Reviewed-by: York Sun <york.sun@nxp.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-08-021-2/+2
|\ | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1046aqds.h include/configs/ls1046ardb.h
| * soc/fsl-layerscape: Update SVR number for LS2081A and LS2041ASantan Kumar2017-08-011-2/+2
| | | | | | | | | | | | | | | | | | | | | | Update SVR as per the SOC document. -LS2081A: 0x870919 -> 0x870918 -LS2041A: 0x870915 -> 0x870914 Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | x86: kconfig: Select PCI and DM_PCIBin Meng2017-08-011-1/+1
| | | | | | | | | | | | | | | | PCI is the de facto interconnect bus in an x86 system. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: tegra: pci: Convert to livetreeSimon Glass2017-07-281-29/+24
|/ | | | | | | | | | Update the tegra pci driver to support a live device tree. Fix the check for nvidia,num-lanes so that an error will actually be detected. Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1 Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
* dm: ofnode: rename ofnode_read_prop() to ofnode_get_property()Masahiro Yamada2017-07-111-1/+1
| | | | | | | | | | | | | This function returns the pointer to the value of a node property. The current name ofnode_read_prop() is confusing. Follow the naming of_get_property() from Linux. The return type (const u32 *) is wrong. DT property values can be strings as well as integers. This is why of_get_property/fdt_getprop returns an opaque pointer. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* dm: core: Add functions to obtain node's address/size cellsSimon Glass2017-07-111-3/+3
| | | | | | | | | | | | | | | | The of_n_addr_cells() and of_n_size_cells() functions are useful for getting the size of addresses in a node, but in a few places U-Boot needs to obtain the actual property value for a node without walking up the stack. Add functions for this and just the existing code to use it. Add a comment to the existing ofnode functions which do not do the right thing with a flat tree. This fixes a problem reading PCI addresses. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-on: Beaver, Jetson-TK1
* powerpc: remove 4xx supportHeiko Schocher2017-07-031-38/+0
| | | | | | | | | There was for long time no activity in the 4xx area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 4xx, so remove it. Signed-off-by: Heiko Schocher <hs@denx.de>
* Merge git://www.denx.de/git/u-boot-imxTom Rini2017-06-271-0/+38
|\ | | | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/imx6qdl_icore_rqs.h include/configs/imx6ul_geam.h include/configs/imx6ul_isiot.h
| * drivers: pci: imx: add imx_pcie_remove functionTim Harvey2017-05-311-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There is no dedicated reset signal wired up for the MX6QDL thus if the bootloader enables the link we need some special handling to get the core back into a state where it is safe to touch it for configuration. While there has been some special handling in the Linux kernel to do this, it was removed in 4.11 thus we need to do it properly in the bootloader and therefore without this if you enable PCI in the bootloader you will hang while booting the 4.11 kernel. This puts the PCIe controller back into a safe state for the kernel driver before launching the kernel. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Tested-by: Peter Senna Tschudin <peter.senna@collabora.com>
* | powerpc, 8260: remove support for mpc8260Heiko Schocher2017-06-121-16/+1
| | | | | | | | | | | | | | | | | | There was for long time no activity in the 8260 area. We need to go further and convert to Kconfig, but it turned out, nobody is interested anymore in 8260, so remove it. Signed-off-by: Heiko Schocher <hs@denx.de>
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