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* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-05-261-7/+13
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| * driver: net: fsl-mc: Update fsl_mc_ldpaa_exit() pathYogesh Gaur2017-05-231-7/+13
| | | | | | | | | | | | | | | | | | | | | | Earlier when MC is loaded but DPL is not deployed results in FDT fix-up code execution hangs. For this case now print message on console and return success instead of return -ENODEV. This update allows fdt fixup to continue execution. Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com> Signed-off-by: Priyanka Jain <Priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2017-05-262-47/+228
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Move FTMAC100 to where it should be, alphabetically in drivers/net/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: drivers/net/Kconfig
| * | nds32: eth: Support ftmac100 DM.rick2017-05-232-47/+228
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Andestech eth ftmac100 device tree flow on AG101P/AE3XX platform. Verification: Boot linux kernel via dhcp and bootm ok. NDS32 # setenv bootm_size 0x2000000;setenv fdt_high 0x1f00000; NDS32 # dhcp 0x600000 10.0.4.97:boomimage-310y-ae300-spi.bin BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4899 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'boomimage-310y-ae300-spi.bin'. Load address: 0x600000 Loading: ################################################################# ################################################################# ################################################################# ... ... ################################### 233.4 KiB/s done Bytes transferred = 13872076 (d3abcc hex) NDS32 # dhcp 0x2000000 10.0.4.97:ae300.dtb BOOTP broadcast 1 BOOTP broadcast 2 BOOTP broadcast 3 BOOTP broadcast 4 DHCP client bound to address 10.0.4.178 (4592 ms) Using mac@e0100000 device TFTP from server 10.0.4.97; our IP address is 10.0.4.178 Filename 'ae300.dtb'. Load address: 0x2000000 Loading: # 82 KiB/s done Bytes transferred = 2378 (94a hex) NDS32 # bootm 0x600000 - 0x2000000 Image Name: Created: 2017-03-22 6:52:03 UTC Image Type: NDS32 Linux Kernel Image (uncompressed) Data Size: 13872012 Bytes = 13.2 MiB Load Address: 0000c000 Entry Point: 0000c000 Verifying Checksum ... OK Booting using the fdt blob at 0x2000000 Loading Kernel Image ... OK Loading Device Tree to 01efc000, end 01eff949 ... OK Linux version 3.10.102-20375-gb0034c1-dirty (rick@app09) (gcc version 4.9.3 (2016-07-06_nds32le-linux-glibc-v3_experimental) ) #293 PREEMPT Wed Mar 22 14:49:28 CST 2017 CPU: NDS32 N13, AndesCore ID(wb), CPU_VER 0x0d11103f(id 13, rev 17, cfg 4159) ... ... Signed-off-by: rick <rick@andestech.com>
* | | net: ravb: Add Renesas Ethernet RAVB driverMarek Vasut2017-05-223-0/+610
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | Add driver for the Renesas Ethernet AVB block found in RCar H3/M3. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Cc: Tom Rini <trini@konsulko.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Based on work of: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com> Takeshi Kihara <takeshi.kihara.df@renesas.com> Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
* | net: fec_mxc: specify the registered eth index by dev_idAndy Duan2017-05-181-2/+9
| | | | | | | | | | | | | | | | Specify the registered eth index by dev_id. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* | net: fec_mxc: avoid transfer dev_id -1 to get mac address from fuseAndy Duan2017-05-181-2/+2
| | | | | | | | | | | | | | | | | | | | Avoid transfer parameter dev_id value with "-1" to .fec_get_hwaddr(), it should transfer fec->dev_id to get mac address from fuse. Signed-off-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | net: fec: do not access reserved register for i.MX6ULLPeng Fan2017-05-181-1/+1
|/ | | | | | | | | The MIB RAM and FIFO receive start register does not exist on i.MX6ULL. Accessing these register will cause enet not work well or cause system report fault. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Joe Hershberger <joe.hershberger@ni.com>
* net: uli526x: Fix unknown storage size errorTom Rini2017-05-121-1/+0
| | | | | | | | | The variable netdev_ethtool_ops is not referenced, drop it. However with gcc-6 or later we fail to even compile as we do not have the required struct definition in U-Boot. Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* net: phy: mv88e61xx: Fix uninitialized variable warningTom Rini2017-05-121-1/+3
| | | | | | | | | | | | | The variable 'res' may be unused uninitialized if our call to mv88e61xx_port_read (register read) fails and we goto the error handling section. In this case we set 'res' to -EIO to indicate why we failed. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chris Packham <judge.packham@gmail.com> Cc: Kevin Smith <kevin.smith@elecsyscorp.com> Cc: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* net: eepro100: Fix unused variable warningTom Rini2017-05-121-6/+0
| | | | | | | The variable i82557_config_cmd is never referenced, drop. Cc: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2017-05-091-17/+35
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| * net: macb: Align the compatibles with kernelWenyou Yang2017-05-091-0/+4
| | | | | | | | | | | | | | Add the compatibles to align with the kernel. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * net: macb: Add remove callbackWenyou Yang2017-05-091-17/+31
| | | | | | | | | | | | | | | | | | | | To avoid the failure of mdio_register(), add the remove callback to unregister the mii_dev when removing the ethernet device. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Fixed up unused variable warning, e.g. for gurnard: Signed-off-by: Simon Glass <sjg@chromium.org>
* | net: mvpp2: Add remove function that is called before the OS is startedStefan Roese2017-05-091-0/+24
|/ | | | | | | | | | | | | | This patch adds a remove function to the mvpp2 ethernet driver which is called before the OS is started, doing: - Allocate the used buffers back from the buffer manager - Stop the BM activity Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Merge git://git.denx.de/u-boot-sunxiTom Rini2017-04-251-0/+17
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| * sunxi: Convert CONFIG_RGMII to KconfigMylène Josserand2017-04-201-0/+6
| | | | | | | | | | | | | | | | | | Convert CONFIG_RGMII to Kconfig. Thanks to that, it is possible to update defconfig files of SYS_EXTRA_OPTIONS accordingly and remove it when it is possible. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Convert SUNXI_EMAC to KconfigMylène Josserand2017-04-201-0/+6
| | | | | | | | | | | | | | | | | | Convert the SUNXI_EMAC config to Kconfig. Remove it from SYS_EXTRA_OPTIONS from many sunxi defconfig and renamed it into SUN4I_EMAC to not confuse it with SUN8I_EMAC. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * sunxi: Move SUNXI_GMAC to KconfigMylène Josserand2017-04-201-0/+5
| | | | | | | | | | | | | | | | Move the SUNXI_GMAC config option to Kconfig, remove it from SYS_EXTRA_OPTIONS and rename it into SUN7I_GMAC. Signed-off-by: Mylène Josserand <mylene.josserand@free-electrons.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-04-182-2/+2
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| * | armv8: ls1043a: Drop macro CONFIG_LS1043AYork Sun2017-04-171-1/+1
| | | | | | | | | | | | | | | | | | Use CONFIG_ARCH_LS1043A instead. Signed-off-by: York Sun <york.sun@nxp.com>
| * | armv8: ls2080a: Drop macro CONFIG_LS2080AYork Sun2017-04-171-1/+1
| |/ | | | | | | | | | | Use CONFIG_ARCH_LS2080A instead. Signed-off-by: York Sun <york.sun@nxp.com>
* / drivers: remove Blackfin specific driversMasahiro Yamada2017-04-183-585/+0
|/ | | | | | | | | | These drivers have no user since commit ea3310e8aafa ("Blackfin: Remove"). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
* Merge git://git.denx.de/u-boot-dmTom Rini2017-04-131-2/+2
|\ | | | | | | | | Here with some DM changes as well as the long-standing AT91 DM/DT conversion patches which I have picked up via dm.
| * gpio: at91_gpio: remove CPU_HAS_PIO3 macroWenyou Yang2017-04-131-2/+2
| | | | | | | | | | | | | | | | | | | | | | The intention of the removal is the preparation to introduce the new AT91 PIO pinctrl driver. Use the union to make the PIO3 and PIO2's registers be together and make their offset aligned. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2017-04-131-0/+13
|\ \ | |/ |/| | | | | | | Drop CONFIG_STACKSIZE from include/configs/imx6_logic.h Signed-off-by: Tom Rini <trini@konsulko.com>
| * drivers: net: phy: add MV88E6xx options to KconfigTim Harvey2017-03-201-0/+13
| | | | | | | | | | | | Signed-off-by: Tim Harvey <tharvey@gateworks.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2017-04-081-6/+80
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| * | sun8i_emac: configure PHY reset GPIO via DMPhilipp Tomsich2017-04-071-6/+80
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This ports the support for configuring a GPIO for resetting the Ethernet PHY (incl. such details as the reset polarity and pulse-length) from the Designware driver. X-AffectedPlatforms: A64-uQ7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | | Remove various unused interrupt related codeTom Rini2017-04-061-17/+0
|/ / | | | | | | | | | | | | | | | | | | | | | | | | With d53ecad92f06 some unused interrupt related code was removed. However all of these options are currently unused. Rather than migrate some of these options to Kconfig we just remove the code in question. The only related code changes here are that in some cases we use CONFIG_STACKSIZE in non-IRQ related context. In these cases we rename and move the value local to the code in question. Fixes: d53ecad92f06 ("Merge branch 'master' of git://git.denx.de/u-boot-sunxi") Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2017-04-061-1/+1
|\ \ | | | | | | | | | | | | | | | trini: Disable CONFIG_SPL_USE_ARCH_MEMSET on orangepi_2 Signed-off-by: Tom Rini <trini@konsulko.com>
| * | sunxi: prepare for sharing MACH_SUN8I_H3 config symbolAndre Przywara2017-04-051-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Allwinner H5 is very close to the H3 SoC, but has ARMv8 cores. To allow sharing the clocks, GPIO and driver code easily, create an architecture agnostic MACH_SUNXI_H3_H5 Kconfig symbol. Rename the existing symbol to MACH_SUNXI_H3_H5 where code is shared and let it be selected by a new shared Kconfig option. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
* | | SPARC: RemoveTom Rini2017-04-053-759/+0
| | | | | | | | | | | | | | | | | | | | | The SPARC architecture is currently unmaintained, remove. Cc: Francois Retief <fgretief@spaceteq.co.za> Signed-off-by: Tom Rini <trini@konsulko.com>
* | | Blackfin: RemoveTom Rini2017-04-051-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The architecture is currently unmaintained, remove. Cc: Benjamin Matthews <mben12@gmail.com> Cc: Chong Huang <chuang@ucrobotics.com> Cc: Dimitar Penev <dpn@switchfin.org> Cc: Haitao Zhang <hzhang@ucrobotics.com> Cc: I-SYST Micromodule <support@i-syst.com> Cc: M.Hasewinkel (MHA) <info@ssv-embedded.de> Cc: Marek Vasut <marex@denx.de> Cc: Martin Strubel <strubel@section5.ch> Cc: Peter Meerwald <devel@bct-electronic.com> Cc: Sonic Zhang <sonic.adi@gmail.com> Cc: Valentin Yakovenkov <yakovenkov@niistt.ru> Cc: Wojtek Skulski <info@skutek.com> Cc: Wojtek Skulski <skulski@pas.rochester.edu> Signed-off-by: Tom Rini <trini@konsulko.com>
* | | net: gmac_rockchip: Add support for the RK3399 GMACPhilipp Tomsich2017-04-041-29/+111
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The GMAC in the RK3399 is very similar to the RK3288 variant (i.e. it is a Designware GMAC core and requires similar configuration as the RK3288 to switch it to RGMII and set up the TX/RX delays for Gigabit). The key difference is that the register offsets (within the GRF block) and bit-offsets (within those registers) used to hold the configuration differ between the various RK32/33 CPUs. This change refactors the gmac_rockchip.c driver to use a function table (selected via driver_data) to factor out these differences. Each function's implementation then matches the underlying processor. Some collateral changes are needed in the definitions describing the bits and offsets in the GRF are needed to prefix each set of symbolic constants with the SoC name to avoid name clashes... and in doing so, the shifts for masks and constants have been moved into the header files for readability (and to make it easier to stay below 80 chars). X-AffectedPlatforms: RK3399-Q7 Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org> Fixed commit message typo s/factor our/factor out/: Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2017-04-042-226/+1625
|\ \ | | | | | | | | | | | | | | | This includes Marvell mvpp2 patches with the ethernet support for the ARMv8 Armada 7k/8k platforms. The ethernet patches are all acked by Joe and he is okay with me pushing them via the Marvell tree.
| * | net: mvpp2: Remove unreferenced in_use_thresh from struct mvpp2_bm_poolStefan Roese2017-03-291-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | As pointed out by Stefan Chulski, this variable is unused and should be removed. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Configure SMI PHY address needed for PHY pollingStefan Roese2017-03-291-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On PPv2.2 we enable PHY polling, so we also need to configure the PHY address in the specific PHY address rgisters. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Enable PHY polling mode on PPv2.2Stefan Roese2017-03-291-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Testing shows, that PHY polling needs to be enabled on Armada 7k/8k. Otherwise ethernet transfers will not work correctly. PHY polling is enabled per default after reset, so we do not need to specifically enable it, but this makes it clearer. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Add missing PHY_INTERFACE_MODE_RGMII_IDStefan Roese2017-03-291-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a missing occurrance of PHY_INTERFACE_MODE_RGMII_ID, which should be handled identical to PHY_INTERFACE_MODE_RGMII. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Add GoP and NetC support for port 0 (SFI)Stefan Roese2017-03-291-0/+161
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the GoP (Group of Ports) and NetC (Net Complex) setup to the Marvell mvpp2 ethernet driver for the missing port 0. This code is mostly copied from the Marvell U-Boot version and was written by Stefan Chulski. Please note that only SFI support have been added, as this is the only interface that this code has been tested with. XAUI and RXAUI support might follow at a later stage. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Add GoP and NetC support for ports 2 & 3 (RGMII & SGMII)Stefan Roese2017-03-291-8/+756
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the GoP (Group of Ports) and NetC (Net Complex) setup to the Marvell mvpp2 ethernet driver. This code is mostly copied from the Marvell U-Boot version and was written by Stefan Chulski. Please note that only RGMII and SGMII support have been added, as these are the only interfaces that this code has been tested with. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Read phy-speed from DT to select between 1GB and 2.5GB SGMIIStefan Roese2017-03-291-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read the "phy-speed" DT property to differentiate between 1 and 2.5GB SGMII operations. Please note that its unclear right now, if this DT property will be accepted in mainline Linux. If not, we need to revisit this code and change it to use the accepted property. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Restructure probe / init functionsStefan Roese2017-03-291-30/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch does a bit of restructuring of the probe / init functions, mainly to allow earlier register access as it is needed for the upcoming GoP (Group of Ports) and NetC (Net Complex) code. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Add RX and TX FIFO configuration for PPv2.2Stefan Roese2017-03-291-7/+68
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the PPv2.2 specific FIFO configuration to the mvpp2 driver. The RX FIFO packet data size is changed to the recommended FIFO sizes. The TX FIFO configuration is newly added. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Handle eth device naming in multi-CP case correctlyStefan Roese2017-03-291-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the naming of the ethernet ports is not handled correctly in the multi-CP (Communication Processor) case. On Armada 8k, the slave-CP also instantiates an ethernet controller with the same device ID's. This patch now takes this into account and adds the required base-id so that the slave-CP ethernet devices will be named "mvpp2-3 ...". This patch also updates my Copyright notice to include 2017 as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Chulski <stefanc@marvell.com> Cc: Kostya Porotchkin <kostap@marvell.com> Cc: Nadav Haklai <nadavh@marvell.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Enable compilation for Armada 7K/8K platformsStefan Roese2017-03-291-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Since Armada 7K/8K is also equipped with a newer version of the MVPP2 ethernet controller, lets enable compilation of this driver for these platforms. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2.c: Clear all buffer / descriptor areas before usageStefan Roese2017-03-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | This fixes problems noticed with the PPv2.2 A7k/8k port, when not all elements of the descriptors had been cleared before use. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Move probe function from MISC to ETH DM driverStefan Roese2017-03-291-37/+43
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves the base_probe function mvpp2_base_probe() from the MISC driver to the ETH driver. When integrated in the MISC driver, probe is called too early before the U-Boot ethernet infrastructure (especially the MDIO / PHY interface) has been initialized. Resulting in errors in mdio_register(). Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
| * | net: mvpp2: Add MDIO support for PPv2.2Stefan Roese2017-03-291-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In U-Boot the MDIO / SMI support is integrated in the mvpp2 driver, currently only supporting the 32bit platforms (Armada 37x). This patch now adds the A7k/8k PPv2.2 MDIO support to that the phy / mii IF can be used as well on these platforms. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
generated by cgit (git 2.34.1) at 2024-10-01 11:33:27 +0000