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ddr
Commit message (
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Author
Age
Files
Lines
*
armv8: ls1088a: Add NXP LS1088A SoC support
Ashish Kumar
2017-09-11
1
-1
/
+1
*
env: Rename getenv/_f() to env_get()
Simon Glass
2017-08-16
3
-8
/
+8
*
arm: mvebu: ddr3_debug: remove self assignments
xypron.glpk@gmx.de
2017-08-13
1
-9
/
+0
*
arm: mvebu: remove self assignment
xypron.glpk@gmx.de
2017-08-13
1
-2
/
+0
*
driver/ddr: Add support for setting timing in hws_topology_map
Marek BehĂșn
2017-07-12
2
-0
/
+15
*
treewide: remove unneeded semicolons
Masahiro Yamada
2017-06-16
1
-1
/
+1
*
driver: ddr: fsl: Fix compiling error for DDR2
York Sun
2017-06-12
1
-0
/
+4
*
common: arm: freescale: layerscape: Move header files out of common.h
Simon Glass
2017-06-05
4
-4
/
+8
*
common: freescale: Move arch-specific declarations
Simon Glass
2017-06-05
5
-0
/
+13
*
Merge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini
2017-04-18
1
-36
/
+36
|
\
|
*
drivers: ddr: fsl: fix unused-const-variable warnings
Thomas Schaefer
2017-04-17
1
-36
/
+36
*
|
ddr: fsl: incorrect logical constraint in populate_memctl_options
xypron.glpk@gmx.de
2017-04-18
1
-1
/
+1
|
/
*
Merge branch 'master' of git://git.denx.de/u-boot-socfpga
Tom Rini
2017-04-14
3
-1
/
+9
|
\
|
*
arm: socfpga: Convert Altera DDR SDRAM driver to use Kconfig
Ley Foon Tan
2017-04-14
3
-1
/
+9
*
|
board_f: Rename initdram() to dram_init()
Simon Glass
2017-04-13
1
-2
/
+2
|
/
*
board_f: Drop return value from initdram()
Simon Glass
2017-04-05
1
-0
/
+2
*
ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLS
York Sun
2017-01-04
9
-64
/
+64
*
ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to Kconfig
York Sun
2017-01-04
1
-0
/
+14
*
powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
York Sun
2017-01-04
1
-0
/
+15
*
arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to Kconfig
York Sun
2017-01-04
1
-0
/
+21
*
fsl_ddr: Move DDR config options to driver Kconfig
York Sun
2017-01-04
2
-1
/
+123
*
fsl/ddr: Add erratum_a009942_check_cpo and clean related erratum
Shengzhou Liu
2016-12-05
3
-31
/
+134
*
fsl/ddr: Fix compiling warning
Shengzhou Liu
2016-12-05
1
-32
/
+25
*
powerpc: MPC8555: Remove macro CONFIG_MPC8555
York Sun
2016-11-23
2
-2
/
+2
*
powerpc: mpc8541: Remove macro CONFIG_MPC8541
York Sun
2016-11-23
2
-2
/
+2
*
ddr: altera: Configuring SDRAM extra cycles timing parameters
Chin Liang See
2016-10-27
1
-0
/
+3
*
Various, accumulated typos collected from around the tree.
Robert P. J. Day
2016-10-06
1
-1
/
+1
*
Merge git://git.denx.de/u-boot-fsl-qoriq
Tom Rini
2016-09-26
4
-40
/
+213
|
\
|
*
driver: ddr: fsl_mmdc: Pass board parameters through data structure
York Sun
2016-09-26
1
-19
/
+19
|
*
ddr: fsl: fix a compile issue
Shaohui Xie
2016-09-14
1
-1
/
+6
|
*
driver/ddr/fsl: Add general MMDC driver and reuse common MMDC driver for ls1012a
Shengzhou Liu
2016-09-14
2
-0
/
+157
|
*
driver/ddr/fsl: Revise workaround A008511 for A009803
York Sun
2016-09-14
1
-36
/
+47
|
*
driver/ddr/fsl: Add more debug registers
York Sun
2016-09-14
2
-3
/
+3
*
|
drivers: squash lines for immediate return
Masahiro Yamada
2016-09-23
3
-25
/
+5
|
/
*
driver/ddr/fsl: Fix timing_cfg_2
York Sun
2016-08-02
1
-1
/
+1
*
Various, unrelated tree-wide typo fixes.
Robert P. J. Day
2016-07-16
1
-1
/
+1
*
driver/ddr/fsl: Check condition for erratum A-009803
Shengzhou Liu
2016-06-03
1
-19
/
+23
*
drivers/ddr/fsl: Disabling data init if ECC is not enabled
York Sun
2016-06-03
1
-1
/
+2
*
drivers/ddr/fsl: Fix timing_cfg_2 register
York Sun
2016-06-03
1
-1
/
+1
*
drivers/ddr/fsl: Update clk_adjust of sdram_clk_cntl
Shengzhou Liu
2016-06-03
1
-2
/
+9
*
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Tom Rini
2016-05-24
1
-4
/
+23
|
\
|
*
driver/ddr/fsl: Add workaround for erratum A-010165
Shengzhou Liu
2016-05-18
1
-1
/
+9
|
*
driver/ddr/fsl: Add workaround for erratum A-009801
Shengzhou Liu
2016-05-17
1
-0
/
+7
|
*
drivers/ddr/fsl: update workaround for erratum A-008511
Shengzhou Liu
2016-05-17
1
-3
/
+7
*
|
arm: mvebu: a38x: Weed out floating point use
Marek Vasut
2016-05-20
1
-19
/
+10
|
/
*
Fix spelling of "occurred".
Vagrant Cascadian
2016-05-02
2
-2
/
+2
*
ddr: altera: Repair DQ window centering code
Marek Vasut
2016-04-20
1
-8
/
+7
*
ddr: altera: Staticize global variables
Marek Vasut
2016-04-20
1
-4
/
+4
*
ddr: altera: Make DLEVEL behavior inclusive
Marek Vasut
2016-04-20
1
-66
/
+66
*
ddr: altera: Zero DM IN delay in scc_mgr_zero_group()
Marek Vasut
2016-04-20
1
-3
/
+13
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