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path: root/drivers/ddr/altera
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* dm: ddr: socfpga: fix gen5 ddr driver to not use bssSimon Goldschmidt2019-07-212-642/+740
* arm: socfpga: Move Stratix 10 SDRAM driver to DMLey Foon Tan2019-05-063-77/+360
* ddr: altera: Compile ALTERA SDRAM in SPL onlyLey Foon Tan2019-05-062-3/+4
* ddr: altera: Stratix10: Add ECC memory scrubbingLey Foon Tan2019-04-171-0/+81
* ddr: altera: Stratix10: Add multi-banks DRAM size checkLey Foon Tan2019-04-171-5/+41
* ddr: altera: stratix10: Move SDRAM size check to SDRAM driverLey Foon Tan2019-04-171-0/+15
* arm: socfpga: move gen5 SDR driver to DMSimon Goldschmidt2019-04-174-16/+173
* ddr: socfpga: Clean up ddr_setup()Marek Vasut2019-03-091-28/+15
* ddr: socfpga: Clean up EMIF resetMarek Vasut2019-03-091-26/+7
* ddr: socfpga: Fix EMIF clear timeoutMarek Vasut2019-03-091-14/+11
* ddr: socfpga: Fix newline in debug print on A10Marek Vasut2019-03-091-1/+1
* ddr: socfpga: Fix IO in Arria10 DDR driverMarek Vasut2019-03-091-3/+3
* socfpga: stratix10: fix sdram_calculate_sizeDalon Westergreen2018-09-151-2/+2
* ddr: altera: Add ECC DRAM scrubbing support for Arria10Marek Vasut2018-07-121-0/+27
* ddr: altera: Drop custom dram_bank_mmu_setup() on Arria10Marek Vasut2018-07-121-25/+0
* ddr: altera: stratix10: Add DDR support for Stratix10 SoCLey Foon Tan2018-07-122-0/+389
* SPDX: Fixup SPDX tags in a few new filesTom Rini2018-05-201-2/+1
* configs: Add DDR Kconfig support for Arria 10Tien Fong Chee2018-05-181-1/+1
* ARM: socfpga: Add DDR driver for Arria 10Tien Fong Chee2018-05-182-0/+742
* ARM: socfpga: Rename the gen5 sdram driver to more specific nameTien Fong Chee2018-05-182-1/+1
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-074-9/+4
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-271-2/+0
* ddr: altera: silence PHY calibration unless in debug modeGoldschmidt Simon2018-01-251-4/+4
* arm: socfpga: Convert Altera DDR SDRAM driver to use KconfigLey Foon Tan2017-04-142-1/+8
* ddr: altera: Configuring SDRAM extra cycles timing parametersChin Liang See2016-10-271-0/+3
* ddr: altera: Repair DQ window centering codeMarek Vasut2016-04-201-8/+7
* ddr: altera: Staticize global variablesMarek Vasut2016-04-201-4/+4
* ddr: altera: Make DLEVEL behavior inclusiveMarek Vasut2016-04-201-66/+66
* ddr: altera: Zero DM IN delay in scc_mgr_zero_group()Marek Vasut2016-04-201-3/+13
* ddr: altera: Remove unnecessary ODT mode configMarek Vasut2016-04-201-1/+0
* ddr: altera: Remove unnecessary update of the SCCMarek Vasut2016-04-201-1/+0
* ddr: altera: Fix DRAM end value in protection ruleMarek Vasut2016-04-201-1/+1
* ddr: altera: Fix scc_mgr_set() argument orderMarek Vasut2016-04-201-1/+1
* ddr: altera: Tweak DQS tracking enable handlingMarek Vasut2016-04-201-2/+5
* ddr: altera: Replace ad-hoc constant with macroMarek Vasut2016-04-201-2/+2
* ddr: altera: Init the rule ID in debug codeMarek Vasut2016-01-161-0/+1
* ddr: altera: Repair uninited variableMarek Vasut2015-08-231-1/+1
* ddr: altera: Replace float multiplication with integer oneMarek Vasut2015-08-231-1/+1
* ddr: altera: sequencer: Clean checkpatch issuesMarek Vasut2015-08-081-71/+88
* ddr: altera: sequencer: Clean data typesMarek Vasut2015-08-081-48/+48
* ddr: altera: sequencer: Pluck out misc macros from codeMarek Vasut2015-08-081-22/+15
* ddr: altera: sequencer: Zap SEQ_T(INIT|RESET)_CNTR._VALMarek Vasut2015-08-082-49/+4
* ddr: altera: sequencer: Zap VFIFO_SIZEMarek Vasut2015-08-082-7/+4
* ddr: altera: sequencer: Wrap misc remaining macrosMarek Vasut2015-08-081-0/+2
* ddr: altera: sequencer: Pluck out IO_* macros from codeMarek Vasut2015-08-081-101/+100
* ddr: altera: sequencer: Wrap IO_* macrosMarek Vasut2015-08-081-0/+2
* ddr: altera: sequencer: Pluck out RW_MGR_* macros from codeMarek Vasut2015-08-082-154/+154
* ddr: altera: sequencer: Wrap RW_MGR_* macrosMarek Vasut2015-08-081-0/+4
* ddr: altera: sequencer: Wrap ac_rom_init and inst_rom_initMarek Vasut2015-08-081-6/+8
* ddr: altera: sequencer: Zap bogus redefinition of RW_MGR_MEM_NUMBER_OF_RANKSMarek Vasut2015-08-081-1/+0
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