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* clk: uniphier: add System clock supportMasahiro Yamada2017-08-304-0/+67
* clk: rmobile: Split R8A7795 and R8A7796 core clock tablesMarek Vasut2017-08-261-33/+96
* ARM: uniphier: remove sLD3 SoC supportMasahiro Yamada2017-08-202-6/+0
* clk: uniphier: fix unmet direct dependencies warningMasahiro Yamada2017-08-201-3/+2
* rockchip: clk: remove RATE_TO_DIVKever Yang2017-08-137-29/+20
* rockchip: clk: update dwmmc clock divKever Yang2017-08-136-19/+26
* rockchip: clk: rk3368: add support for configuring the SPI clocksPhilipp Tomsich2017-08-131-26/+107
* rockchip: clk: rk3368: mark 'priv' __maybe_unused in rk3368_clk_set_rate()Philipp Tomsich2017-08-131-1/+1
* rockchip: clk: rk3368: add support for GMAC (SLCK_MAC) clockPhilipp Tomsich2017-08-131-2/+17
* rockchip: clk: rk3368: support configuring the DRAM PLL (from TPL)Philipp Tomsich2017-08-131-6/+7
* rockchip: clk: rk3368: implement MMC/SD clock reparentingPhilipp Tomsich2017-08-131-28/+91
* rockchip: clk: rk3368: implement DPLL (DRAM PLL) supportPhilipp Tomsich2017-08-131-0/+35
* rockchip: clk: rk3368: do not change CPLL/GPLL before returning to BROMPhilipp Tomsich2017-08-131-1/+17
* rockchip: clk: rk3368: support OF_PLATDATA for the RK3368 clk driverPhilipp Tomsich2017-08-131-0/+17
* rockchip: clk: rk3368: implement bandwidth adjust for PLLsPhilipp Tomsich2017-08-131-5/+12
* spl: dm: Kconfig: split CLK support for SPL and TPLPhilipp Tomsich2017-08-132-1/+11
* spl: dm: Kconfig: SPL_CLK depends on SPL_DMPhilipp Tomsich2017-08-131-1/+1
* Merge tag 'xilinx-for-v2017.09' of git://www.denx.de/git/u-boot-microblazeTom Rini2017-08-041-146/+546
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| * clk: zynqmp: Remove unused macros/variablesMichal Simek2017-08-021-4/+0
| * clk: zynqmp: Dont panic incase of mmio write/read failuresSiva Durga Prasad Paladugu2017-08-021-19/+44
| * clk: zynqmp: Add support for CCF driverSiva Durga Prasad Paladugu2017-08-021-147/+526
* | clk: rmobile: Add RCar Gen3 clock driverMarek Vasut2017-08-035-0/+967
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* clk: fix compilation errors for poplar platformPatrice Chotard2017-07-281-23/+24
* clk: add clk_release_all()Patrice Chotard2017-07-281-0/+26
* rockchip: clk: rk3368: use correct (i.e. 'rk3368_clk_priv') structure for aut...Philipp Tomsich2017-07-271-1/+1
* clk: stm32f7: remove clock_get()Patrice Chotard2017-07-261-48/+0
* clk: stm32f7: cleanup clocks unused definitionsPatrice Chotard2017-07-261-3/+0
* clk: stm32f7: add clock .get_rate() callbackPatrice Chotard2017-07-261-0/+62
* clk: stm32f7: get RCC base address from DTPatrice Chotard2017-07-261-19/+38
* clk: stm32f7: add static for configure_clocks()Patrice Chotard2017-07-261-1/+1
* rockchip: rk322x: add clock driverKever Yang2017-07-112-0/+414
* Merge git://git.denx.de/u-boot-uniphierTom Rini2017-06-241-1/+1
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| * ARM: uniphier: fix various sparse warningsMasahiro Yamada2017-06-251-1/+1
* | Merge branch 'master' of git://git.denx.de/u-boot-rockchipTom Rini2017-06-231-3/+3
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| * | rockchip: clk: rk3036: correct setting for pll integer modeKever Yang2017-06-231-3/+3
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* / clk_rv1108.c: Fix unused variable warningTom Rini2017-06-231-3/+0
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* rockchip: Init clocks again when chain-loadingSimon Glass2017-06-091-6/+19
* rockchip: rk3288: Convert clock driver to use shifted masksSimon Glass2017-06-091-69/+52
* rockchip: clk: Add rv1108 clock driverAndy Yan2017-06-072-0/+224
* rockchip: clock: rk3036: some fix according TRMKever Yang2017-06-071-9/+9
* rockchip: rk3036: clean mask definition for cru regKever Yang2017-06-071-45/+34
* rockchip: rk3368: Add clock driverAndy Yan2017-06-072-0/+292
* dm: clk: fixed: Update to support livetreeSimon Glass2017-06-011-3/+2
* dm: clk: Update uclass to support livetreeSimon Glass2017-06-012-11/+8
* clk: Modify xlate() method for livetreeSimon Glass2017-06-014-7/+7
* dm: core: Update device_bind_driver_to_node() to use ofnodeSimon Glass2017-06-011-1/+1
* dm: core: Replace of_offset with accessor (part 2)Simon Glass2017-06-011-1/+1
* dm: Rename dev_addr..() functionsSimon Glass2017-06-0110-13/+13
* dm: Use dm.h header when driver mode is usedSimon Glass2017-06-0114-16/+14
* Merge git://git.denx.de/u-boot-rockchipTom Rini2017-05-105-7/+161
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