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* stm32mp1: clk: support digital bypassPatrick Delaunay2018-07-201-9/+18
* stm32mp1: clk: add ADC clock gatingPatrick Delaunay2018-07-201-0/+7
* stm32mp1: clk: update Ethernet clock gatingPatrick Delaunay2018-07-201-2/+1
* stm32mp1: clk: add LDTC and DSI clock supportPatrick Delaunay2018-07-201-3/+93
* stm32mp1: clk: add common function pll_get_fvcoPatrick Delaunay2018-07-201-30/+61
* stm32mp1: clk: define RCC_PLLNCFGR2_SHIFT macroPatrick Delaunay2018-07-201-9/+6
* misc: stm32: Add STM32MP1 supportPatrick Delaunay2018-07-201-6/+0
* clk: zynqmp: Fixed the same if/else part error reported by coverityVipul Kumar2018-07-191-2/+4
* clk: Add Actions Semi OWL clock supportManivannan Sadhasivam2018-07-095-0/+155
* clk: add Amlogic meson clock driverBeniamino Galvani2018-06-193-0/+441
* clk: rmobile: Add R8A77995 RPC clockMarek Vasut2018-06-141-0/+5
* clk: rmobile: Add R8A77990 RPC clockMarek Vasut2018-06-141-0/+5
* Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2018-06-025-32/+386
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| * clk: renesas: Add R8A77990 E3 clock tablesMarek Vasut2018-06-013-0/+311
| * clk: renesas: Add PE clock handlingMarek Vasut2018-06-012-6/+40
| * clk: renesas: Add PLL1 and PLL3 dividersMarek Vasut2018-06-011-4/+8
| * clk: renesas: Pass clock rate around as 64bit number internallyMarek Vasut2018-06-011-25/+31
| * clk: renesas: Fix swapped arguments in debug messageMarek Vasut2018-06-011-1/+1
* | clk: bcm6345: convert to use live dtÁlvaro Fernández Rojas2018-06-011-6/+2
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* clk: at91: clk-h32mx: replace dm_warn with dev_dbgEugen Hristev2018-05-231-1/+1
* rockchip: clk: rk3288: handle clk_enable requests for GMACJonathan Gray2018-05-141-0/+10
* clk: armada-37xx: Support soc_clk_dumpMarek Behún2018-05-142-1/+37
* driver: clk: Add support for clocks on Armada 37xxMarek Behún2018-05-146-0/+631
* clk: Add ICS8N3QV01 driverMario Six2018-05-083-0/+239
* clk: stm32mp1: Add VREF clock gatingFabrice Gasnier2018-05-081-0/+3
* clk: clk_stm32f: Use PLLSAIP as USB 48MHz clockPatrice Chotard2018-05-081-11/+25
* SPDX: Convert all of our multiple license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-0754-107/+54
* clk: renesas: Drop USB extal from the R8A7792 clock driverMarek Vasut2018-05-021-2/+0
* Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTRTom Rini2018-04-2715-30/+0
* rockchip: rv1108: add ofdata_to_platdata() method for driverKever Yang2018-04-251-1/+9
* rockchip: rk3128: add ofdata_to_platdata() method for driverKever Yang2018-04-251-1/+10
* rockchip: rk3036: add ofdata_to_platdata() method for driverKever Yang2018-04-251-1/+10
* rockchip: clk: rk3288: add clk_enable function and support USB HOST0/HSICWadim Egorov2018-04-251-0/+13
* clk: uniphier: disable SPL_CLKMasahiro Yamada2018-04-241-1/+0
* clk: renesas: Minor clean up of the R8A7794 clock driverMarek Vasut2018-04-211-7/+3
* clk: renesas: Minor clean up of the R8A7792 clock driverMarek Vasut2018-04-211-7/+3
* Merge git://git.denx.de/u-boot-uniphierTom Rini2018-04-181-0/+6
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| * clk: uniphier: add ethernet clock control supportKunihiko Hayashi2018-04-181-0/+6
* | clk: fix clk_get_bulk when phandle errorNeil Armstrong2018-04-171-2/+2
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* clk: renesas: Minor clean up of the R8A7790 clock driverMarek Vasut2018-04-131-7/+3
* clk: add sandbox test for bulk APINeil Armstrong2018-04-101-0/+29
* clk: Add get/enable/disable/release for a bulk of clocksNeil Armstrong2018-04-101-0/+59
* clk: zynqmp: Add new compatible string for clock driverMichal Simek2018-04-091-0/+1
* clock: stm32mp1: add stgen clock source change supportPatrick Delaunay2018-04-061-1/+45
* rockchip: clk: rk3188: update dpll settings to make EMAC workAlexander Kochetkov2018-03-281-1/+1
* arm64: zynqmp: Print the value of pl clocks and wdt clock using clk dumpVipul Kumar2018-03-231-0/+75
* clk: zynq: Show watchdog clock rate properlyMichal Simek2018-03-231-1/+1
* clk: stm32mp1: add clock tree initializationPatrick Delaunay2018-03-191-0/+576
* clk: add driver for stm32mp1Patrick Delaunay2018-03-193-0/+1166
generated by cgit (git 2.34.1) at 2025-01-10 21:02:34 +0000