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* clk: MediaTek: bind ethsys reset controllerWeijie Gao2019-01-143-0/+32
* clk: imx8: fix build warningPeng Fan2019-01-091-0/+2
* clk: uniphier: add NAND 200MHz clockMasahiro Yamada2018-12-291-3/+5
* clk: stm32: add hardware spinlock clockBenjamin Gaignard2018-12-061-0/+3
* clk: Allow clock defaults to be set during re-reloc state for SPL onlyPhilipp Tomsich2018-12-061-0/+4
* Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2018-12-031-7/+3
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| * clk: renesas: Allow reconfiguring SDHI clock on Gen3Marek Vasut2018-12-031-7/+3
* | ARM: meson: Add regmap support for clock driverLoic Devulder2018-12-031-29/+30
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* rockchip: rk3399: Initialize CPU B clock.Christoph Muellner2018-11-301-9/+70
* ARM: rockchip: rv1108: Sync clock with vendor treeOtavio Salvador2018-11-301-6/+469
* Merge tag 'u-boot-amlogic-20181126' of git://git.denx.de/u-boot-amlogicTom Rini2018-11-293-4/+320
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| * clk: Add clock driver for AXGNeil Armstrong2018-11-262-1/+317
| * ARM: meson: rework soc arch file to prepare for new SoCJerome Brunet2018-11-261-1/+1
| * clk: meson: silence debug printJerome Brunet2018-11-261-1/+1
| * clk: meson: add static to meson_gates tableNeil Armstrong2018-11-261-1/+1
* | clk: MediaTek: add clock driver for MT7623 SoC.Ryder Lee2018-11-282-0/+871
* | clk: MediaTek: add clock driver for MT7629 SoC.Ryder Lee2018-11-285-0/+1403
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* misc: Update read() and write() methods to return bytes xferedSimon Glass2018-11-201-2/+2
* clk: meson: fix clk81 divider calculationJerome Brunet2018-11-201-1/+2
* clk: Allow clock defaults to be set also during re-reloc stateAndreas Dannenberg2018-11-161-4/+0
* clk: Remove DM_FLAG_PRE_RELOC flag in various driversBin Meng2018-11-145-7/+0
* aspeed: ast2500: fix D2-PLL clock setting in RGMII modeCédric Le Goater2018-11-051-0/+38
* aspeed: ast2500: fix missing break in D2PLL clock enablementCédric Le Goater2018-11-051-0/+1
* drivers: cosmetic: Convert SPDX license tags to Linux Kernel stylePatrick Delaunay2018-10-286-10/+7
* clk: imx: add clk driver for i.MX8QXPPeng Fan2018-10-225-0/+406
* clk: Add support for Arm's Versatile Express OSC clock generatorsLiviu Dudau2018-09-303-0/+117
* Merge git://git.denx.de/u-boot-marvellTom Rini2018-09-191-1/+129
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| * clk: armada-37xx-periph: Support changing clock parent and rateMarek Behún2018-09-191-1/+129
* | clk: Add MPC83xx clock driverMario Six2018-09-184-0/+796
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* clk: Introduce TI System Control Interface (TI SCI) clock driverAndreas Dannenberg2018-09-113-0/+226
* clk: clk_meson: Add mux and div support for reparent and rate settingNeil Armstrong2018-09-101-5/+528
* Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2018-08-201-4/+4
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| * clk: Kconfig: Ascending order to sub directiory kconfigsJagan Teki2018-08-101-4/+4
* | Merge branch 'master' of git://git.denx.de/u-boot-socfpgaTom Rini2018-08-173-0/+371
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| * | clk: socfpga: Add initial Arria10 clock driverMarek Vasut2018-08-133-0/+371
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* / clk: at91: utmi: add timeout for utmi lockEugen Hristev2018-08-131-1/+6
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* clk: clk_set_default: accept no-op skip fieldsNeil Armstrong2018-08-041-0/+8
* clk: add clk_valid()Fabrice Gasnier2018-08-031-0/+13
* stm32mp1: clk: support digital bypassPatrick Delaunay2018-07-201-9/+18
* stm32mp1: clk: add ADC clock gatingPatrick Delaunay2018-07-201-0/+7
* stm32mp1: clk: update Ethernet clock gatingPatrick Delaunay2018-07-201-2/+1
* stm32mp1: clk: add LDTC and DSI clock supportPatrick Delaunay2018-07-201-3/+93
* stm32mp1: clk: add common function pll_get_fvcoPatrick Delaunay2018-07-201-30/+61
* stm32mp1: clk: define RCC_PLLNCFGR2_SHIFT macroPatrick Delaunay2018-07-201-9/+6
* misc: stm32: Add STM32MP1 supportPatrick Delaunay2018-07-201-6/+0
* clk: zynqmp: Fixed the same if/else part error reported by coverityVipul Kumar2018-07-191-2/+4
* clk: Add Actions Semi OWL clock supportManivannan Sadhasivam2018-07-095-0/+155
* clk: add Amlogic meson clock driverBeniamino Galvani2018-06-193-0/+441
* clk: rmobile: Add R8A77995 RPC clockMarek Vasut2018-06-141-0/+5
* clk: rmobile: Add R8A77990 RPC clockMarek Vasut2018-06-141-0/+5
generated by cgit (git 2.34.1) at 2025-01-10 20:56:35 +0000