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* Merge tag 'u-boot-rockchip-20190823' of https://gitlab.denx.de/u-boot/custodi...Tom Rini2019-08-241-0/+12
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| * rockchip: clk: rk3328: add clk_enable ops for HCLK_HOST0Kever Yang2019-08-231-0/+12
* | clk: imx: add i.MX8MM clk driverPeng Fan2019-08-222-0/+417
* | clk: imx: add i.MX8M composite clk supportPeng Fan2019-08-221-0/+170
* | clk: imx: add pll14xx driverPeng Fan2019-08-222-0/+406
* | clk: imx: expose CCF entry for allPeng Fan2019-08-222-2/+16
* | sandbox: clk: add clk enable/disable test codePeng Fan2019-08-221-0/+15
* | clk: prograte clk enable/disable to parentPeng Fan2019-08-221-6/+71
* | clk: introduce enable_countPeng Fan2019-08-222-0/+2
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* clk: add support for clk_is_match()Sekhar Nori2019-08-121-0/+13
* clk: renesas: Add R8A77980 V3H clock tablesMarek Vasut2019-08-093-0/+262
* clk: MediaTek: add hifsys entry for MT7623 SoC.Ryder Lee2019-08-073-23/+51
* Merge https://gitlab.denx.de/u-boot/custodians/u-boot-clkTom Rini2019-08-0212-14/+681
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| * clk: sandbox: add composite clkPeng Fan2019-07-311-0/+80
| * clk: gate: support sandboxPeng Fan2019-07-311-0/+11
| * clk: add composite clk supportPeng Fan2019-07-313-0/+175
| * dm: clk: ignore default settings when node not validPeng Fan2019-07-311-0/+3
| * clk: imx: gate2 add set ratePeng Fan2019-07-311-0/+11
| * clk: imx: import clk heplersPeng Fan2019-07-311-0/+81
| * clk: fixed_rate: export clk_fixed_ratePeng Fan2019-07-311-7/+1
| * clk: divider set rate supporrtPeng Fan2019-07-311-0/+88
| * clk: add clk-gate supportPeng Fan2019-07-312-1/+149
| * clk: mux: add set parent supportPeng Fan2019-07-311-2/+68
| * clk: use clk_dev_bindedPeng Fan2019-07-312-4/+6
| * clk: introduce clk_dev_bindedPeng Fan2019-07-311-0/+8
* | clk: meson: remove duplicate logicHeinrich Schuchardt2019-07-311-4/+1
* | Merge tag 'u-boot-rockchip-20190729' of https://gitlab.denx.de/u-boot/custodi...Tom Rini2019-07-291-0/+3
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| * rockchip: rk3188: init CPU freq in clock driverKever Yang2019-07-291-0/+3
* | Merge tag 'u-boot-imx-20190719' of https://gitlab.denx.de/u-boot/custodians/u...Tom Rini2019-07-2717-6/+1280
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| * clk: sandbox: Add sandbox test code for Common Clock Framework [CCF]Lukasz Majewski2019-07-193-1/+195
| * clk: sandbox: Adjust clk-mux.c to emulate reading divider value from HWLukasz Majewski2019-07-191-1/+9
| * clk: sandbox: Adjust clk-divider to emulate reading its value from HWLukasz Majewski2019-07-191-1/+9
| * dm: clk: Extend clk_get_parent_rate() to support CLK_GET_RATE_NOCACHE flagLukasz Majewski2019-07-191-2/+2
| * clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)Lukasz Majewski2019-07-1913-0/+1005
| * dm: clk: Define clk_get_by_id() for clk operationsLukasz Majewski2019-07-191-0/+22
| * dm: clk: Define clk_get_parent_rate() for clk operationsLukasz Majewski2019-07-191-0/+22
| * dm: clk: Define clk_get_parent() for clk operationsLukasz Majewski2019-07-191-0/+16
| * clk: Provide struct clk for fixed rate clock (clk_fixed_rate.c)Lukasz Majewski2019-07-191-0/+5
| * clk: Remove clock ID check in .get_rate() of clk_fixed_*Lukasz Majewski2019-07-192-6/+0
* | clk: initialize clk->data when using default xlateSekhar Nori2019-07-241-0/+2
* | Merge tag 'u-boot-stm32-20190723' of https://gitlab.denx.de/u-boot/custodians...Tom Rini2019-07-231-0/+9
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| * | clk: stm32mp1: Add RTC clock entryPatrick Delaunay2019-07-221-0/+9
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* | Merge tag 'rockchip-for-v2019.07' of https://gitlab.denx.de/u-boot/custodians...Tom Rini2019-07-211-37/+51
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| * | clk: rockchip: rk3399: Set 400MHz ddr clockJagan Teki2019-07-211-0/+4
| * | clk: rockchip: rk3399: Set 50MHz ddr clockJagan Teki2019-07-211-0/+4
| * | clk: rockchip: rk3399: Fix check patch warnings and checksJagan Teki2019-07-191-37/+31
| * | rockchip: clk: rk3399: handle clk_enable requests for USB3Mark Kettenis2019-07-191-0/+12
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* | clk: sifive: Drop GEMGXL clock driverAnup Patel2019-07-193-69/+0
* | clk: sifive: Sync-up main driver with upstream LinuxAnup Patel2019-07-191-36/+60
* | clk: sifive: Sync-up DT bindings header with upstream LinuxAnup Patel2019-07-191-1/+1
generated by cgit (git 2.34.1) at 2025-02-01 01:04:13 +0000