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* dt-bindings: pinctrl: at91-pio4: add slew-rateClaudiu Beznea2021-03-021-3/+4
| | | | | | Document slew-rate DT binding for SAMA7G5. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
* dt-bindings: pinctrl: at91-pio4: add property for drive strengthEugen Hristev2021-01-221-0/+2
| | | | | | Add drive strength property which is equivalent with the one in Linux Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
* pinctrl: k210: Rename power domains to match datasheetSean Anderson2020-11-171-1/+1
| | | | | | | | This renames power domains to match the names on the k210 datasheet. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com> Reviewed-by: Rick Chen <rick@andestech.com>
* pinctrl: Add support for Kendryte K210 FPIOASean Anderson2020-10-081-0/+102
| | | | | | | | | | | The Fully-Programmable Input/Output Array (FPIOA) device controls pin multiplexing on the K210. The FPIOA can remap any supported function to any multifunctional IO pin. It can also perform basic GPIO functions, such as reading the current value of a pin. However, GPIO functionality remains largely unimplemented (in favor of the dedicated GPIO peripherals). Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* pinctrl: Add pinmux property support to pinctrl-genericSean Anderson2020-10-081-6/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The pinmux property allows for smaller and more compact device trees, especially when there are many pins which need to be assigned individually. Instead of specifying an array of strings to be parsed as pins and a function property, the pinmux property contains an array of integers representing pinmux groups. A pinmux group consists of the pin identifier and mux settings represented as a single integer or an array of integers. Each individual pin controller driver specifies the exact format of a pinmux group. As specified in the Linux documentation, a pinmux group may be multiple integers long. However, no existing drivers use multi-integer pinmux groups, so I have chosen to omit this feature. This makes the implementation easier, since there is no need to allocate a buffer to do endian conversions. Support for the pinmux property is done differently than in Linux. As far as I can tell, inversion of control is used when implementing support for the pins and groups properties to avoid allocating. This results in some duplication of effort; every property in a config node is parsed once for each pin in that node. This is not such an overhead with pins and groups properties, since having multiple pins in one config node does not occur especially often. However, the semantics of the pinmux property make such a configuration much more appealing. A future patch could parse all config properties at once and store them in an array. This would make it easier to create drivers which do not function solely as callbacks from pinctrl-generic. This commit increases the size of the sandbox build by approximately 48 bytes. However, it also decreases the size of the K210 device tree by 2 KiB from the previous version of this series. The documentation has been updated from the last Linux commit before it was split off into yaml files. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* pinctrl: add nexell driverStefan Bosch2020-07-291-0/+78
| | | | | | | | Changes in relation to FriendlyARM's U-Boot nanopi2-v2016.01: - livetree API (dev_read_...) is used instead of fdt one (fdt...). - doc/device-tree-bindings/pinctrl/nexell,s5pxx18-pinctrl.txt added. Signed-off-by: Stefan Bosch <stefan_b@posteo.net>
* x86: p2sb: Drop 'apl' prefixWolfgang Wallner2020-03-051-1/+1
| | | | | | | | | | | | | Drop the Apollo Lake prefix 'apl' from the functions, types and variables in the P2SB driver. The P2SB is not Apollo Lake specific, and as such it was moved in commit 2999846c1127 ("x86: Move P2SB from Apollo Lake to a more generic location") from the Apollo Lake folder to the intel_common folder. Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* x86: Add a generic Intel pinctrl driverSimon Glass2019-12-151-0/+39
| | | | | | | | | | | | | | | Recent Intel SoCs share a pinctrl mechanism with many common elements. Add an implementation of this core functionality, allowing SoC-specific drivers to avoid adding common code. As well as a pinctrl driver this provides a GPIO driver based on the same code. Once other SoCs use this driver we may consider moving more properties to the device tree (e.g. the community info and pad definitions). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* dt-bindings: pinctrl: stm32: add new entry for package informationPatrick Delaunay2019-07-121-13/+88
| | | | | | | | | | | | | Add "st,package" entry. Possibles values are: -STM32MP_PKG_AA for LFBGA448 (18*18) package -STM32MP_PKG_AB for LFBGA354 (16*16) package -STM32MP_PKG_AC for TFBGA361 (12*12) package -STM32MP_PKG_AD for TFBGA257 (10*10) package see Linux commit 966d9b928f626a54a0c27c0fdae1e3dfe9bab416 for v5.2-rc1 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* doc: device-tree-bindings: switch from spi-flash to jedec, spi-norNeil Armstrong2019-04-121-1/+1
| | | | | | | | | | | Since all DTS files has been switched to "jedec,spi-nor", remove the "spi-flash" compatible from the bindings examples. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* pinctrl: bcm6838: add pinctrl supportPhilippe Reynes2018-09-221-0/+35
| | | | | | Add pinctrl support for broadcom bcm6838 SoC. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
* mvebu: pinctrl: sync compatible string with Linux 4.17-rc4Evan Wang2018-05-291-8/+8
| | | | | | | | | | | For pinctrl driver of mvebu, the compatible strings supported are defined differently from Linux version. The patch aligned the compatible string with Linux 4.17-rc4. Signed-off-by: Evan Wang <xswang@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
* doc: a37xx: Introduce pinctrl device tree bindingKen Ma2018-03-301-0/+186
| | | | | | | | | | | Reviewed-on: http://vgitil04.il.marvell.com:8080/43289 Tested-by: iSoC Platform CI <ykjenk@marvell.com> Reviewed-by: Kostya Porotchkin <kostap@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Signed-off-by: Ken Ma <make@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
* PINCTRL: stm32f7: add pin control driverVikas Manocha2017-03-171-0/+133
| | | | | | | | | This driver uses the same pin control binding as that of linux, binding document of this patch is copied from linux. One addition done is for GPIO input and output mode configuration which was missing. Signed-off-by: Vikas Manocha <vikas.manocha@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* arm64: mvebu: Add pin control nodes to A8K family DTS filesKonstantin Porotchkin2016-12-121-22/+22
| | | | | | | | | | | | | | | Add pin control nodes to APN806, CP-master, CP-slave and Armada-7040 and Armada-8040 boards DTS files Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
* arm64: mvebu: pinctrl: Add pin control driver for A8K familyKonstantin Porotchkin2016-12-123-0/+408
| | | | | | | | | | | | | | | | | | | | Add a DM port of Marvell pin control driver. The A8K SoC family contains several silicone dies interconnected in a single package. Every die is normally equipped with its own pin controller unit. There are 2 pin controllers in A70x0 SoC and 3 in A80x0 SoC. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
* atmel: Bring in at91 pio4 device tree file and bindingsWenyou Yang2016-08-151-0/+66
| | | | | | | | Bring in required device tree file and bindings from Linux. Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Andreas Bießmann <andreas@biessmann.org> Reviewed-by: Simon Glass <sjg@chromium.org>
* dts: Bring in pinctrl device tree bindingSimon Glass2016-01-211-0/+236
| | | | | | Add this binding file since we now use it in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org>
* rockchip: Bring in RK3288 device tree file includes and bindingsSimon Glass2015-09-021-0/+157
Bring in required device tree files from Linux. Since mainline Linux is somewhat behind, use the files from the Chromium tree. We can re-sync once further code is acccepted upstream. Signed-off-by: Simon Glass <sjg@chromium.org>
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