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* cmd/exception: support ebreak exception on RISC-VHeinrich Schuchardt2021-05-051-0/+10
| | | | | | | | The ebreak instruction should generate a breakpoint exception. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
* cmd/riscv/sbi: support System Reset ExtensionHeinrich Schuchardt2021-02-251-0/+1
| | | | | | | | | | | | Let the sbi command detect the 'System Reset Extension' (EID #0x53525354 "SRST"). Cf. https://github.com/riscv/riscv-sbi-doc Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com> Reviewed-by: Leo Liang <ycliang@andestech.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
* cmd: add more implementation IDs to sbi commandHeinrich Schuchardt2021-01-291-16/+21
| | | | | | | | | Additional SBI implementation IDs have been added to the upcoming next version of the SBI specification. https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
* cmd: provide command sbiHeinrich Schuchardt2020-08-252-0/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Provide a command to display information about the SBI implementation. The output might look like: => sbi SBI 0.2 OpenSBI Extensions: sbi_set_timer sbi_console_putchar sbi_console_getchar sbi_clear_ipi sbi_send_ipi sbi_remote_fence_i sbi_remote_sfence_vma sbi_remote_sfence_vma_asid sbi_shutdown SBI Base Functionality Timer Extension IPI Extension RFENCE Extension Hart State Management Extension The command can be used to construct a unit test checking that the communication with the SEE is working. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Pragnesh Patel <pragnesh.patel@openfive.com> Tested-by: Pragnesh Patel <pragnesh.patel@openfive.com> Reviewed-by: Rick Chen <rick@andestech.com> Tested-by: Rick Chen <rick@andestech.com>
* cmd: exception: unaligned data access on RISC-VHeinrich Schuchardt2020-08-141-1/+16
| | | | | | | | | | | | | | | The command 'exception' can be used to test the handling of exceptions. Currently the exception command only allows to create an illegal instruction exception on RISC-V. Provide a sub-command 'exception unaligned' to cause a misaligned load address exception. Adjust the online help for 'exception undefined'. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Rick Chen <rick@andestech.com>
* command: Remove the cmd_tbl_t typedefSimon Glass2020-05-181-3/+3
| | | | | | | | | | | | | We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org>
* cmd: add exception commandHeinrich Schuchardt2019-04-222-0/+32
The 'exception' command allows to test exception handling. This implementation supports ARM, x86, RISC-V and the following exceptions: * 'breakpoint' - prefetch abort exception (ARM 32bit only) * 'unaligned' - data abort exception (ARM only) * 'undefined' - undefined instruction exception Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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