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path: root/arch/x86/dts/minnowmax.dts
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* x86: dts: switch spi-flash to jedec, spi-nor compatibleNeil Armstrong2019-04-121-1/+1
* x86: dts: Remove coreboot_fb.dtsiBin Meng2018-08-201-1/+0
* x86: Switch to use DM sysreset driverBin Meng2018-07-201-0/+1
* SPDX: Convert all of our single license tags to Linux Kernel styleTom Rini2018-05-071-2/+1
* x86: minnowmax: Enable USB xHCI supportBin Meng2017-07-281-0/+3
* x86: baytrail: Change lpe/lpss-sio/scc FSP properties to integerBin Meng2017-06-051-3/+3
* x86: baytrail: Use macros instead of magic numbers for FSP settingsBin Meng2017-06-051-14/+15
* x86: baytrail: Remove "serial-debug-port-*" settingsBin Meng2017-06-051-2/+0
* x86: baytrail: Change "fsp, mrc-init-tseg-size" default value to 1Bin Meng2017-06-051-1/+1
* x86: minnowmax: Remove incorrect pad-offset of several pinsBin Meng2017-05-171-5/+0
* x86: ich6_gpio: Add use-lvl-write-cache for I/O access modeBin Meng2017-05-171-0/+6
* x86: coreboot: Convert to use DM coreboot video driverBin Meng2016-10-121-0/+1
* x86: baytrail: Configure card detect pin of the SD controllerBin Meng2016-06-121-0/+15
* x86: baytrail: Change fsp, emmc-boot-mode to "auto"Bin Meng2016-06-121-1/+1
* x86: baytrail: Add 'reg' property in the pinctrl nodeBin Meng2016-06-121-0/+1
* x86: Use latest microcode for all BayTrail boardsBin Meng2016-05-231-2/+2
* x86: dts: Update to include ACTL register detailsBin Meng2016-05-231-0/+1
* x86: minnowmax: Drop io-base property in the pch_pinctrl nodeBin Meng2016-02-051-1/+0
* x86: ich6_gpio: Convert to use proper DM APIBin Meng2016-02-051-42/+44
* spi: ich: Use compatible strings to distinguish controller versionBin Meng2016-02-051-1/+1
* x86: Correct spi node aliasBin Meng2016-01-281-2/+2
* dm: x86: spi: Convert ICH SPI driver to driver model PCI APISimon Glass2016-01-241-75/+83
* x86: Convert to use driver model timerBin Meng2015-12-011-0/+1
* x86: Enable mrc cache for bayleybay and minnowmaxBin Meng2015-10-211-0/+6
* x86: minnowmax: Correct pad-offset value for host_en1Simon Glass2015-08-261-1/+1
* x86: minnowmax: Add access to GPIOs E0, E1, E2Simon Glass2015-08-261-0/+27
* x86: baytrail: Support multiple microcode copiesBin Meng2015-08-261-0/+3
* x86: minnowmax: Define and enable interrupt setupSimon Glass2015-08-141-3/+66
* x86: baytrail: Configure FSP UPD from device treeAndrew Bradford2015-08-141-0/+56
* x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-281-0/+1
* dm: x86: minnowmax: Move PCI to use driver modelSimon Glass2015-07-141-0/+10
* x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-041-0/+23
* x86: Enable multi-core init for Minnowboard MAXSimon Glass2015-04-301-0/+20
* x86: minnowmax: use the correct NOR in the configurationGabriel Huau2015-04-291-1/+1
* x86: minnowmax: add GPIO banks in the device treeGabriel Huau2015-04-291-0/+42
* x86: Add alias for SPI node in the board dtsBin Meng2015-04-291-1/+2
* x86: Add support for Intel Minnowboard MaxSimon Glass2015-02-061-0/+45
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