summaryrefslogtreecommitdiffstats
path: root/arch/riscv
Commit message (Expand)AuthorAgeFilesLines
* riscv: dts: hifive-unleashed-a00: Make memory node available to SPLBin Meng2020-07-241-0/+4
* riscv: Fix linking error when building u-boot-spl with no SMP supportLeo Yu-Chi Liang2020-07-241-0/+2
* Revert "riscv: Allow use of reset drivers"Bin Meng2020-07-241-2/+0
* env: Enable SPI flash env for SiFive FU540Jagan Teki2020-07-241-0/+13
* sifive: fu540: Add Booting from SPIJagan Teki2020-07-241-0/+12
* riscv: Make SiFive HiFive Unleashed board boot againBin Meng2020-07-242-5/+13
* Merge branch 'next'Tom Rini2020-07-0616-103/+801
|\
| * riscv: dts: hifive-unleashed-a00: add cpu aliasesSagar Shrikant Kadam2020-07-011-0/+4
| * riscv: Add Sipeed Maix supportSean Anderson2020-07-011-0/+4
| * riscv: Add device tree for K210 and Sipeed Maix BitMSean Anderson2020-07-013-0/+642
| * riscv: Allow use of reset driversSean Anderson2020-07-011-0/+2
| * riscv: Add option to support RISC-V privileged spec 1.9Sean Anderson2020-07-013-0/+59
| * riscv: Clean up IPI initialization codeSean Anderson2020-07-016-86/+84
| * riscv: Clear pending interrupts before enabling IPIsSean Anderson2020-07-011-0/+2
| * riscv: Add headers for asm/global_data.hSean Anderson2020-07-011-0/+2
| * bdinfo: riscv: Use generic bd_infoSimon Glass2020-06-251-17/+2
* | riscv: use log functions in fdt_fixupHeinrich Schuchardt2020-07-031-6/+8
* | riscv: sifive: fu540: enable all cache ways from U-Boot properPragnesh Patel2020-07-034-0/+72
* | riscv: Use optimized version of fdtdec_get_addr_size_no_parentAtish Patra2020-07-031-3/+3
* | riscv: Do not return error if reserved node already existsAtish Patra2020-07-031-1/+1
* | riscv: Do not build reset.c if SYSRESET is onBin Meng2020-07-031-0/+2
* | riscv: Enable CONFIG_OF_BOARD_FIXUP by default for OF_SEPARATEBin Meng2020-07-021-0/+3
* | riscv: Expand the DT size before copy reserved memory nodeBin Meng2020-07-021-0/+12
* | riscv: Avoid the reserved memory fixup if src and dst point to the same placeBin Meng2020-07-021-4/+8
* | riscv: fu540: dts: Correct reg size of otp and dmc nodesBin Meng2020-07-021-2/+2
* | riscv: fu540: dts: Remove the unnecessary space in the cpu2_intc nodeBin Meng2020-07-021-1/+1
|/
* riscv: sbi: Move sbi_probe_extension() out of CONFIG_SBI_V01Bin Meng2020-06-041-18/+19
* riscv: sbi: Remove sbi_spec_versionBin Meng2020-06-042-5/+0
* riscv: sifive: fu540: add SPL configurationPragnesh Patel2020-06-044-0/+46
* riscv: cpu: fu540: Add support for cpu fu540Pragnesh Patel2020-06-047-0/+135
* riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linuxPragnesh Patel2020-06-042-1/+45
* riscv: sifive: dts: fu540: set ethernet clock ratePragnesh Patel2020-06-041-0/+5
* riscv: sifive: dts: fu540: add U-Boot dmc nodePragnesh Patel2020-06-041-0/+9
* sifive: dts: fu540: Add DDR controller and phy register settingsPragnesh Patel2020-06-041-0/+1489
* riscv: sifive: dts: fu540: Add board -u-boot.dtsi filesPragnesh Patel2020-06-042-0/+76
* riscv: Add _image_binary_end for SPLPragnesh Patel2020-06-041-0/+1
* riscv: sifive: fu540: Use OTP DM driver for serial environment variablePragnesh Patel2020-06-042-0/+16
* riscv: Move all SMP related SBI calls to SBI_v01Atish Patra2020-05-262-22/+20
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-182-0/+4
* common: Drop log.h from common headerSimon Glass2020-05-183-0/+3
* command: Remove the cmd_tbl_t typedefSimon Glass2020-05-183-4/+4
* common: Drop init.h from common headerSimon Glass2020-05-182-0/+2
* common: Drop image.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop bootstage.h from common headerSimon Glass2020-05-181-0/+1
* common: Drop net.h from common headerSimon Glass2020-05-182-0/+2
* sifive: fu540: Enable spi-nor flash supportJagan Teki2020-04-301-0/+1
* riscv: dts: hifive-unleashed-a00: Add -u-boot.dtsiJagan Teki2020-04-301-0/+10
* riscv: Move all fdt fixups togetherAtish Patra2020-04-232-33/+33
* riscv: Copy the reserved-memory nodes to final DTAtish Patra2020-04-231-1/+7
* riscv: Setup reserved-memory node for FU540Atish Patra2020-04-231-0/+15