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riscv
Commit message (
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Author
Age
Files
Lines
*
dm: treewide: Rename ..._platdata variables to just ..._plat
Simon Glass
2020-12-13
2
-2
/
+2
*
riscv: sifive/fu540: kconfig: Enable support for Opencores I2C controller
Pragnesh Patel
2020-11-28
1
-0
/
+2
*
riscv: fu540: dts: Correct reg size of clint node
Pragnesh Patel
2020-10-26
1
-1
/
+1
*
riscv: Move timer portions of SiFive CLINT to drivers/timer
Sean Anderson
2020-10-26
1
-39
/
+2
*
timer: Add _TIMER suffix to Andes PLMT Kconfig
Sean Anderson
2020-10-26
1
-1
/
+1
*
riscv: Move Andes PLMT driver to drivers/timer
Sean Anderson
2020-10-26
3
-58
/
+0
*
riscv: k210: Reduce DMA block size
Sean Anderson
2020-10-26
1
-2
/
+2
*
riscv: Only enable OF_BOARD_FIXUP for S-Mode
Sean Anderson
2020-10-26
1
-1
/
+1
*
timer: Return count from timer_ops.get_count
Sean Anderson
2020-10-22
2
-8
/
+4
*
riscv: add DT binding for BOOT button on Maix board
Heinrich Schuchardt
2020-10-08
1
-0
/
+11
*
riscv: Add pinmux and gpio bindings for Kendryte K210
Sean Anderson
2020-10-08
2
-0
/
+116
*
Merge branch 'next'
Tom Rini
2020-10-05
20
-168
/
+189
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\
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*
riscv: Add some comments to start.S
Sean Anderson
2020-09-30
1
-2
/
+17
|
*
riscv: Ensure gp is NULL or points to valid data
Sean Anderson
2020-09-30
2
-4
/
+27
|
*
riscv: Consolidate fences into AMOs for available_harts_lock
Sean Anderson
2020-09-30
1
-6
/
+3
|
*
riscv: Clear pending IPIs on initialization
Sean Anderson
2020-09-30
1
-0
/
+20
|
*
riscv: Use a valid bit to ignore already-pending IPIs
Sean Anderson
2020-09-30
2
-2
/
+21
|
*
riscv: Match memory barriers between send_ipi_many and handle_ipi
Sean Anderson
2020-09-30
1
-0
/
+2
|
*
Revert "riscv: Clear pending interrupts before enabling IPIs"
Sean Anderson
2020-09-30
1
-2
/
+0
|
*
riscv: Update SiFive device tree for new CLINT driver
Sean Anderson
2020-09-30
2
-2
/
+10
|
*
riscv: Update Kendryte device tree for new CLINT driver
Sean Anderson
2020-09-30
1
-3
/
+4
|
*
riscv: Rework Sifive CLINT as UCLASS_TIMER driver
Sean Anderson
2020-09-30
2
-32
/
+34
|
*
riscv: Clean up initialization in Andes PLIC
Sean Anderson
2020-09-30
1
-33
/
+25
|
*
riscv: Rework Andes PLMT as a UCLASS_TIMER driver
Sean Anderson
2020-09-30
4
-32
/
+23
|
*
riscv: Rework riscv timer driver to only support S-mode
Sean Anderson
2020-09-30
6
-50
/
+3
|
*
fdtdec: optionally add property no-map to created reserved memory node
Etienne Carriere
2020-09-22
1
-1
/
+1
*
|
riscv: restore global data pointer in trap handler
Heinrich Schuchardt
2020-09-28
1
-0
/
+3
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/
*
riscv: define function set_gd()
Heinrich Schuchardt
2020-09-14
1
-0
/
+9
*
cmd: provide command sbi
Heinrich Schuchardt
2020-08-25
2
-0
/
+38
*
riscv: fix building with CONFIG_SPL_SMP=n
Heinrich Schuchardt
2020-08-25
1
-1
/
+1
*
riscv: fu540: Use correct API to get L2 cache controller base address
Bin Meng
2020-08-25
1
-1
/
+2
*
riscv: additional crash information
Heinrich Schuchardt
2020-08-14
1
-22
/
+35
*
riscv: sifive: fu540: redundant initialization
Heinrich Schuchardt
2020-08-14
1
-1
/
+1
*
riscv: remove redundant logical constraint.
Heinrich Schuchardt
2020-08-14
1
-1
/
+1
*
riscv: sifive/fu540: kconfig: Move FU540 driver related options to the SoC level
Bin Meng
2020-08-14
1
-0
/
+22
*
riscv: sifive/fu540: spl: Rename soc_spl_init()
Bin Meng
2020-08-14
2
-2
/
+2
*
riscv: Call spl_board_init_f() in the generic SPL board_init_f()
Bin Meng
2020-08-14
2
-0
/
+16
*
sifive: reset: add DM based reset driver for SiFive SoC's
Sagar Shrikant Kadam
2020-08-04
1
-0
/
+13
*
fu540: dtsi: add reset producer and consumer entries
Sagar Shrikant Kadam
2020-08-04
1
-0
/
+12
*
riscv: dts: hifive-unleashed-a00: Make memory node available to SPL
Bin Meng
2020-07-24
1
-0
/
+4
*
riscv: Fix linking error when building u-boot-spl with no SMP support
Leo Yu-Chi Liang
2020-07-24
1
-0
/
+2
*
Revert "riscv: Allow use of reset drivers"
Bin Meng
2020-07-24
1
-2
/
+0
*
env: Enable SPI flash env for SiFive FU540
Jagan Teki
2020-07-24
1
-0
/
+13
*
sifive: fu540: Add Booting from SPI
Jagan Teki
2020-07-24
1
-0
/
+12
*
riscv: Make SiFive HiFive Unleashed board boot again
Bin Meng
2020-07-24
2
-5
/
+13
*
Merge branch 'next'
Tom Rini
2020-07-06
16
-103
/
+801
|
\
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*
riscv: dts: hifive-unleashed-a00: add cpu aliases
Sagar Shrikant Kadam
2020-07-01
1
-0
/
+4
|
*
riscv: Add Sipeed Maix support
Sean Anderson
2020-07-01
1
-0
/
+4
|
*
riscv: Add device tree for K210 and Sipeed Maix BitM
Sean Anderson
2020-07-01
3
-0
/
+642
|
*
riscv: Allow use of reset drivers
Sean Anderson
2020-07-01
1
-0
/
+2
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