Commit message (Collapse) | Author | Age | Files | Lines | |
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* | dm: treewide: Rename ..._platdata variables to just ..._plat | Simon Glass | 2020-12-13 | 1 | -1/+1 |
| | | | | | | | Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org> | ||||
* | gpio: sifive: add support for DM based gpio driver for FU540-SoC | Sagar Shrikant Kadam | 2019-10-18 | 1 | -0/+35 |
| | | | | | | | | | | | | | | | | | This patch adds a DM based driver model for gpio controller present in FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and GPIO15 are routed to the J1 header on the board. This implementation is ported from linux based gpio driver submitted for review by Wesley W. Terpstra <wesley@sifive.com> and/or Atish Patra <atish.patra@wdc.com> (many thanks !!). The linux driver can be referred here [1] [1]: https://lkml.org/lkml/2018/10/9/1103 Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> | ||||
* | riscv: Add place-holder asm/arch/clk.h for driver compilation | Anup Patel | 2019-02-27 | 1 | -0/+14 |
Some of the drivers (such as Cadence MACB ethernet driver) expect asm/arch/clk.h to be provided by arch support so we add place-holder asm/arch-generic/clk.h for RISC-V generic CPU. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> |