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* Revert "Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dm"Tom Rini2020-07-249-39/+38
| | | | | | | | | | This reverts commit 5d3a21df6694ebd66d5c34c9d62a26edc7456fc7, reversing changes made to 56d37f1c564107e27d873181d838571b7d7860e7. Unfortunately this is causing CI failures: https://travis-ci.org/github/trini/u-boot/jobs/711313649 Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge tag 'dm-pull-20jul20' of git://git.denx.de/u-boot-dmTom Rini2020-07-239-38/+39
|\ | | | | | | | | | | | | | | binman support for FIT new UCLASS_SOC patman switch 'test' command minor fdt fixes patman usability improvements
| * treewide: convert devfdt_get_addr() to dev_read_addr()Masahiro Yamada2020-07-202-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When you enable CONFIG_OF_LIVE, you will end up with a lot of conversions. To generate this commit, I used coccinelle excluding drivers/core/, include/dm/, and test/ The semantic patch that makes this change is as follows: <smpl> @@ expression dev; @@ -devfdt_get_addr(dev) +dev_read_addr(dev) </smpl> Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
| * arm: mach-k3: Use SOC driver for device identificationDave Gerlach2020-07-203-36/+19
| | | | | | | | | | | | | | Make use of UCLASS_SOC to find device family and revision for print_cpuinfo. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
| * arm: dts: k3-j721e-mcu-wakeup: Introduce chipid nodeDave Gerlach2020-07-202-0/+9
| | | | | | | | | | | | | | Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3 SoCs. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
| * arm: dts: k3-am65-wakeup: Introduce chipid nodeDave Gerlach2020-07-202-0/+9
| | | | | | | | | | | | | | Introduce a chipid node to provide a UCLASS_SOC driver to identify TI K3 SoCs. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
* | arm64: dts: rockchip: Add u-boot, spl-boot-order for ROCKPi N10Jagan Teki2020-07-221-0/+6
| | | | | | | | | | | | | | | | Add u-boot,spl-boot-order for ROCKPi N10, so-that it can able to boot from eMMC and SDMMC in order. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | arm64: dts: rockchip: Add PCIe for RockPI N10Jagan Teki2020-07-221-2/+38
| | | | | | | | | | | | | | This patch adds support to enable PCIe for RockPI N10. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | arm: dts: rockchip: Add HDMI out for RockPI N8/N10Jagan Teki2020-07-223-0/+42
| | | | | | | | | | | | | | | | This patch adds support to enable HDMI out for N10 and N8 combinations SBCs. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | ARM: dts: rockchip: Add USB for RockPI N8/N10Jagan Teki2020-07-223-0/+138
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Radxa dalang carrier board has 2x USB 2.0 and 1x USB 3.0 ports. This patch adds support to enable all these USB ports for N10 and N8 combinations SBCs. Note that the USB 3.0 port on RockPI N8 combination works as USB 2.0 OTG since it is driven from RK3288. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | ARM: dts: rockchip: Add usb host0 ohci node for rk3288Jagan Teki2020-07-221-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | rk3288 and rk3288w have a usb host0 ohci controller. Although rk3288 ohci doesn't actually work on hardware, but rk3288w ohci can work well. So add usb host0 ohci node in rk3288 dtsi and the quirk in ohci platform driver will disable ohci on rk3288. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | arm: dts: rockchip: Sync rk3288 dtsi from linuxSuniel Mahesh2020-07-221-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | This sync has changes required to use HDMI CEC pin in U-Boot. Sync dts from linux v5.8-rc5 commit: "ARM: dts: rockchip: define the two possible rk3288 CEC pins" (sha1: 838980dd04e994bf81cf104fa01ae60802146b39) Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
* | ARM: dts: rockchip: Sync ROCKPi N8/N10 dts(i) from LinuxJagan Teki2020-07-225-136/+104
| | | | | | | | | | | | | | | | | | | | | | Sync ROCKPi N8/N10 dts(i) changes from Linux. commit <afd9eb880414> ("ARM: dts: rockchip: Add Radxa Rock Pi N8 initial support") Signed-off-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
* | rockchip: Separate the reset cause from display cpuinfoJagan Teki2020-07-223-9/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | reset cause is a generic functionality based on the soc cru registers in rockchip. This can be used for printing the cause of reset in cpuinfo or some other place where reset cause is needed.  Other than cpuinfo, reset cause can also be using during bootcount for checking the specific reset cause and glow the led based on the reset cause. So, let's separate the reset cause code from cpuinfo, and add a check to build it for rk3399, rk3288 since these two soc are supporting reset cause as of now. Tested-by: Suniel Mahesh <sunil@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: Don't clear the reset status regJagan Teki2020-07-222-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | reset reason can be used several stages of U-Boot bootloader like SPL, U-Boot proper based on the requirements. Clearing the status register end of get_reset_cause will end up showing the wrong reset cause when it read the second time. For example, if board resets, SPL reads the reset status as RST whereas U-Boot proper reads the status as POR. However, based on the latest testing clearing reset status won't be required for determine the last reset cause or following resets. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: tpl: Remove board_early_init_f()Kever Yang2020-07-221-7/+0
| | | | | | | | | | | | | | There is no need for board_early_init_f() in TPL, anything like this should goes to SPL. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: rk3399: Add weak led_setup()Jagan Teki2020-07-221-0/+6
| | | | | | | | | | | | | | | | Add weak led_setup() so that board which has an uncommon led setup code that can make use of custom implementation. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: rk3288: Add OF board setupJagan Teki2020-07-222-0/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new rk3288 revision rk3288w has some changes with respect to legacy rk3288 like hclk_vio in cru and usb host0 ohci. Linux clock driver already handle this via rockchip,rk3288w-cru compatible. USB ohci host can enable via dts for rk3288w based boards. So, add fdt board setup code to update cru compatible with rk3288w-cru compatible if the SOC revision is RK3288W. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: Add rk3288 SoC detection helperJagan Teki2020-07-221-0/+49
| | | | | | | | | | | | | | | | | | | | | | | | | | Rockchip SoC's has a new revision chip for rk3288 SoCs. RK3288 has a new revision chip called RK3288W which is similar but different hclk_vio clock and fixed OHCI host. Add common Rockchip SoC detection helper to support this rk3288w detection. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | arm64: dts: rockchip: Add Radxa ROCK Pi 4C supportJagan Teki2020-07-223-0/+58
| | | | | | | | | | | | | | | | | | | | | | Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled GPIO pin change compared to 4B, 4C. So, add or enable difference nodes/properties in 4C dts by including common dtsi. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | arm64: dts: rockchip: Add ROCKPi 4A/4B supportJagan Teki2020-07-225-27/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rock PI 4 has 3 variants of hardware platforms called RockPI 4A, 4B, and 4C. - Rock PI 4A has no Wif/BT. - Rock PI 4B has AP6256 Wifi/BT, PoE. - Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enable GPIO pin change compared to 4B, 4C So move common nodes, properties into dtsi file and include on respective variant dts files. Use 4B dts into default rock-pi-4 defconfig until we find any solution for dynamic detection of these variants. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: sdram: fix dram_init_banksizeAlex Bee2020-07-221-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently 2.5 GB is calculated as DRAM size for a 1 GB RK322x board if CONFIG_SPL_OPTEE is set. This is troublesome when booting a linux kernel since this size will be injected in FDT of the kernel. gd->bd->bi_dram[0].start (which is basically CONFIG_SYS_SDRAM_BASE) must not be taken into consideration for calculation of second bank size, since this offset is already included in calculation of "top". After applying this patch 992 MB (1024 MB - 32 MB reserved for optee-os) is correctly calculated and has also been verified on 2 GB boards. Signed-off-by: Alex Bee <knaerzche@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: ram: fix debug funcfion define when RAM_ROCKCHIP_DEBUG not setKever Yang2020-07-221-15/+0
| | | | | | | | | | | | | | | | The empty function define should not be in the header file, or else the build will error with function multi definition after CONFIG_RAM_ROCKCHIP_DEBUG is disabled. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | ARM: dts: rk3328-rock64: Add SPI Flash supportJohannes Krottmayer2020-07-221-0/+6
| | | | | | | | | | | | | | | | Add U-Boot SPI Flash support for the PINE64 Rock64 board Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Matwey V. Kornilov <matwey.kornilov@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | ARM: dts: rk3328: Add SPI supportJohannes Krottmayer2020-07-221-0/+5
| | | | | | | | | | | | | | | | | | | | | | Add U-Boot SPI support for the RK3328 Signed-off-by: Johannes Krottmayer <krjdev@gmail.com> Cc: Kever Yang <kever.yang@rock-chips.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (fix checkpatch error for code ident) Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: board: add Hardkernel Odroid Go2 boardHeiko Stuebner2020-07-222-0/+76
| | | | | | | | | | | | | | | | Also known as Odroid Go Advance but named Go2 internally by the vendor it seems. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: px30: sync Odroid Go Advance devicetree from LinuxHeiko Stuebner2020-07-222-1/+718
| | | | | | | | | | | | | | Get the devicetree from mainline Linux and include it for U-Boot uses. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* | rockchip: px30: sync the main rk3326 dtsi from mainlineHeiko Stuebner2020-07-221-0/+15
|/ | | | | | | | The rk3326 is just a trimmed down px30 from a software perspective, so the mainline rk3326 dtsi also ist just a tiny addition. Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
* treewide: convert bd_t to struct bd_info manuallyMasahiro Yamada2020-07-171-1/+1
| | | | | | | | | | | Some code was not converted by coccinelle, somehow. I manually fixed up the remaining, and comments, README docs. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> [trini: Add arch/arm/mach-davinci/include/mach/sdmmc_defs.h and include/fdt_support.h] Signed-off-by: Tom Rini <trini@konsulko.com>
* treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada2020-07-1740-67/+69
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
* Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to KconfigPatrick Delaunay2020-07-171-0/+14
| | | | | | | | This converts the following to Kconfig: CONFIG_ARMV7_PSCI_1_0 CONFIG_ARMV7_PSCI_0_2 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
* Merge tag 'u-boot-imx-20200716' of ↵Tom Rini2020-07-1723-68/+1929
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2020.10 ---------------- - i.MX DDR driver fix/update for i.MX8M - i.MX pinctrl driver fix. - Use arm_smccc_smc to remove imx sip function - i.MX8M clk update - support booting aarch32 kernel on aarch64 hardware - fused part support for i.MX8MP - imx6: pcm058 to DM Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/708734785
| * arm: dts: imx7: Fix error in coresight TPIU graph connectionIlko Iliev2020-07-161-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OF graph endpoint connections must be bidirectional and dtc warn if they are not. i.MX7 based DTs have an error and generate warnings: arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint): /replicator/ports/port@0/endpoint: graph connection to node '/soc/tpiu@30087000/port/endpoint' is not bidirectional arch/arm/dts/imx7d-sdb.dtb: Warning (graph_endpoint): /soc/tpiu@30087000/port/endpoint: graph connection to node '/replicator/ports/port@1/endpoint' is not bidirectional Signed-off-by: Ilko Iliev <iliev@ronetix.at>
| * ARM: mx6: make CAAM usable on the i.MX6 boardsHeinrich Schuchardt2020-07-162-1/+11
| | | | | | | | | | | | | | | | | | | | Even if the HAB fuse is not set we want to be able to use the Cryptographic Accelerator and Assurance Module (CAAM) for generating random numbers. So SYS_FSL_HAS_SEC should be selected even if IMX_HAB is not set. arch_misc_init() has to be called to initialize the CAAM. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
| * misc: scu_api: Add SCFW API to get the index of boot container setYe Li2020-07-162-0/+2
| | | | | | | | | | | | | | | | | | | | Add SCFW API sc_misc_get_boot_container to get current boot container set index. The index value returns 1 for primary container set, 2 for secondary container set. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * arm: imx6q: pcm058: Convert pcm058 to use DM with DTsNiel Fourie2020-07-143-0/+47
| | | | | | | | | | | | | | | | Convert pcm058 support to use device trees and the driver model. Add rudimentary boot scripts to the environment, expand README. Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * arm: dts: imx6q: Add Linux dts files for Phytec MiraNiel Fourie2020-07-143-0/+749
| | | | | | | | | | | | | | | | Add Phytec Mira device tree files, for use with pcm058. >From Linux 5.6, commit 7111951b8d49 upstream Signed-off-by: Niel Fourie <lusus@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * imx8m: implement armv8_el2_to_aarch32Peng Fan2020-07-141-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add iMX8M specific armv8_el2_to_aarch32 to let AArch64 mode U-Boot could boot aarch32 mode linux with FIT image as below: /dts-v1/; / { description = "Configuration to load ARM32 Linux"; images { kernel@1 { description = "ARM32 Linux kernel"; data = /incbin/("./Image"); type = "kernel"; arch = "arm"; os = "linux"; compression = "none"; load = <0x40008000>; entry = <0x40008000>; hash@1 { algo = "md5"; }; }; fdt@1 { description = "Flattened Device Tree blob"; data = /incbin/("./imx8mm-evk.dtb"); type = "flat_dt"; arch = "arm"; compression = "none"; load = <0x43000000>; hash@1 { algo = "md5"; }; }; }; configurations { default = "config@1"; config@1 { description = "fsl-imx8mm-evk"; kernel = "kernel@1"; fdt = "fdt@1"; }; }; }; Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: Refactor the OPTEE memory removalPeng Fan2020-07-141-7/+115
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current codes assume the OPTEE address is at the end of first DRAM bank. Adjust the process to allow OPTEE in the middle of first bank. When OPTEE memory is removed from first bank, it may split the first bank to two banks, adjust the MMU table for the split case, Since the default CONFIG_NR_DRAM_BANKS is 4, it is enough, just enlarge i.MX8MP evk to default to avoid issue. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com> Tested-by: Silvano di Ninno <silvano.dininno@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: disable nodes before kernel/mfgtool boot for fused partPeng Fan2020-07-141-0/+333
| | | | | | | | | | | | | | | | | | To fused part, we need to disable nodes of dtb to let kernel boot. To mfgtool, USB issue when using super-speed for mfgtool, temporally work around the problem to use high-speed only. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8mn/imx8mp: override env_get_offset and env_get_locationYe Li2020-07-141-0/+59
| | | | | | | | | | | | | | | | | | | | To use one defconfig for all boot device, we have to runtime set env offset and return env medium according to the boot device. This patch overrides the env_get_offset and env_get_location to implement the feature. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: power down fused coresPeng Fan2020-07-142-0/+177
| | | | | | | | | | | | | | For non-Quad SoCs, the fused cpu cores could be powered down in SPL to save power. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8mp: Add fused parts supportYe Li2020-07-144-3/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | iMX8MP has 6 fused parts in each qualification tier, with core, VPU, ISP, NPU or DSP fused respectively. The configuration tables for enabled modules: MIMX8ML8DVNLZAA Quad Core, VPU, NPU, ISP, DSP MIMX8ML7DVNLZAA Quad Core, NPU, ISP MIMX8ML6DVNLZAA Quad Core, VPU, ISP MIMX8ML5DVNLZAA Quad Core, VPU MIMX8ML4DVNLZAA Quad Lite MIMX8ML3DVNLZAA Dual Core, VPU, NPU, ISP, DSP Add the support in U-Boot Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: workaround ROM serrorPeng Fan2020-07-141-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ROM SError happens on two cases: 1. ERR050342, on iMX8MQ HDCP enabled parts ROM writes to GPV1 register, but when ROM patch lock is fused, this write will cause SError. 2. ERR050350, on iMX8MQ/MM/MN, when the field return fuse is burned, HAB is field return mode, but the last 4K of ROM is still protected and cause SError. Since ROM mask SError until ATF unmask it, so then ATF always meets the exception. This patch works around the issue in SPL by enabling SPL Exception vectors table and the SError exception, take the exception to eret immediately to clear the SError. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: add eqos clkPeng Fan2020-07-141-0/+90
| | | | | | | | | | | | | | | | | | Add imx_eqos_txclk_set_rate/imx_get_eqos_csr_clk to override the weak function in driver Add set_clk_eqos to configure eQoS clk Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: add sdhc/nand/ecspi clk apiPeng Fan2020-07-141-0/+66
| | | | | | | | | | | | | | | | | | Current DM CLK is a bit complicated, for simplity, let DM clk only support enable/disable/get_rate. For the expected rate settings, we use non-DM clk to do that. Then we could have simple DM clk for i.MX and could also share between SPL/U-Boot proper. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: configure NoC clkPeng Fan2020-07-141-0/+13
| | | | | | | | | | | | Configure NoC clk for better system performance Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx8m: configure arm clk sources from PLLPeng Fan2020-07-141-1/+129
| | | | | | | | | | | | | | A53 CCM root max support 1GHz, to support high freq, we need to switch ARM clk sources from ARM PLL directly. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: remove imx sip filePeng Fan2020-07-142-49/+1
| | | | | | | | | | | | | | We have switch to use arm_smccc_smc, no need to keep i.MX specific sip wrapper. Signed-off-by: Peng Fan <peng.fan@nxp.com>
| * imx: bootaux: use arm_smccc_smcPeng Fan2020-07-141-2/+9
| | | | | | | | | | | | Use arm_smccc_smc to replace call_imx_sip Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit (git 2.34.1) at 2025-01-27 11:32:59 +0000