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| author | Jagan Teki <jagan@amarulasolutions.com> | 2020-07-21 20:36:02 +0530 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2020-07-22 20:55:13 +0800 |
| commit | 88132e0a280adc120642f05f140aa77fd7e52611 (patch) | |
| tree | 2d0f0539c9e302b95c1100e164aec5ca42906a09 /arch/arm | |
| parent | b24405f39b15243dec78dc8c844654204e36d788 (diff) | |
| download | u-boot-88132e0a280adc120642f05f140aa77fd7e52611.tar.gz u-boot-88132e0a280adc120642f05f140aa77fd7e52611.tar.xz u-boot-88132e0a280adc120642f05f140aa77fd7e52611.zip | |
rockchip: Don't clear the reset status reg
reset reason can be used several stages of U-Boot bootloader
like SPL, U-Boot proper based on the requirements.
Clearing the status register end of get_reset_cause will end
up showing the wrong reset cause when it read the second time.
For example, if board resets, SPL reads the reset status as
RST whereas U-Boot proper reads the status as POR.
However, based on the latest testing clearing reset status
won't be required for determine the last reset cause or
following resets.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-rockchip/cpu-info.c | 6 |
2 files changed, 0 insertions, 7 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/cru.h b/arch/arm/include/asm/arch-rockchip/cru.h index 5eb17f9d55..d2057cb738 100644 --- a/arch/arm/include/asm/arch-rockchip/cru.h +++ b/arch/arm/include/asm/arch-rockchip/cru.h @@ -26,7 +26,6 @@ enum { SND_GLB_TSADC_RST_ST = BIT(3), FST_GLB_WDT_RST_ST = BIT(4), SND_GLB_WDT_RST_ST = BIT(5), - GLB_RST_ST_MASK = GENMASK(5, 0), }; #define MHz 1000000 diff --git a/arch/arm/mach-rockchip/cpu-info.c b/arch/arm/mach-rockchip/cpu-info.c index 21ca9dedce..bb5a198039 100644 --- a/arch/arm/mach-rockchip/cpu-info.c +++ b/arch/arm/mach-rockchip/cpu-info.c @@ -47,12 +47,6 @@ static char *get_reset_cause(void) */ env_set("reset_reason", cause); - /* - * Clear glb_rst_st, so we can determine the last reset cause - * for following resets. - */ - rk_clrreg(&cru->glb_rst_st, GLB_RST_ST_MASK); - return cause; } |