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* xilinx: Show silicon version in SPLMichal Simek2021-02-101-2/+2
| | | | | | | | Both Zynq and ZynqMP can show silicon versions in SPL boot flow. It is useful to be aware. The patch is also fixing possition of these bits on ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Get rid of unused macrosMichal Simek2020-11-201-4/+2
| | | | | | | There is no reason to have these macros. But record offsets of missing register in the structure for future use. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Add support for SHA3 commandT Karthik Reddy2020-10-271-0/+5
| | | | | | | | | This patch adds support for SHA3 command. It takes data blob as input and generates 48 bytes sha3 hash value. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Add support for RSA commandT Karthik Reddy2020-10-271-0/+4
| | | | | | | | | This patch adds support for RSA command, performs RSA encrypt & RSA decrypt on data blob of key size. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Add support for encryption and decryption on data blobSiva Durga Prasad Paladugu2020-10-271-0/+1
| | | | | | | | | | | | | | | | | | | | This patch adds support for encryption and decryption on a given data blob using different key sources such as userkey(KUP), device key and PUF key. Inorder to support this a new zynqmp command(zynqmp aes) has been introduced. Command: zynqmp aes srcaddr ivaddr len aesop keysrc dstaddr [keyaddr]\n" Encrypts or decrypts blob of data at src address and puts it\n" back to dstaddr using key and iv at keyaddr and ivaddr\n" respectively. keysrc values specifies from which source key\n" has to be used, it can be User/Device/PUF key. A value of 0\n" for KUP(user key),1 for DeviceKey and 2 for PUF key. The\n" aesop value would specify the operationwhich can be 0 for\n" decrypt and 1 for encrypt(1) operation\n"; Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: remove chip_id functionIbai Erkiaga2020-08-201-1/+0
| | | | | | | | | Remove chip_id function and integrate the firmware call in the zynqmp_get_silicon_idcode_name function. The change avoids querying the firmware twice and makes the code bit more clear. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* xilinx: zynqmp: synchronize firmware call return payloadIbai Erkiaga2020-08-201-2/+0
| | | | | | | | | Removes duplicated definition of PAYLOAD_ARG_CNT and define it in the firmware driver. Additionally fixes payload buffer declarations without macro usage Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* common: Drop linux/bitops.h from common headerSimon Glass2020-05-181-0/+4
| | | | | | Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm64: zynqmp: Print multiboot register value in EL3Michal Simek2020-04-061-1/+3
| | | | | | | Multi boot register can be used for using different boot images and design better boot strategy. Let EL3 SPL or U-Boot to read it and print it. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm: zynqmp: Wire SPL/ATF handoff structure properlyMichal Simek2020-01-141-2/+0
| | | | | | | | | | handoff_setup() was used to generate fixed handoff structure for ATF on ZynqMP platform. Switching to bl2_plat_get_bl31_params() platform brings more flexibility because information can be taken from fit image where /fit-images node is created at run time. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Do not assing MIO34 that early on zcu100Michal Simek2020-01-141-0/+1
| | | | | | | | | | | | MIO34 is connected to POWER_KILL signal. When MIO configuration is done in psu_init() and this pin is assigned to PMU but PMU configuration is not loaded yet. PMU gpio output is high that means board is powered off immediately. The patch is fixing this sequence that MIO34 stays assing to ps gpio IP. PMU config is loaded in SPL and then pin assigned to PMU through psu_post_config_data(). Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mtd: nand: Remove hardcoded base address of nandAshok Reddy Soma2020-01-141-2/+0
| | | | | | | | | Remove hardcoded base address of nand and replace it with the value taken from device tree. Remove base address from header file too. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: xilinx: Move firmware functions from platform to driverMichal Simek2019-10-241-2/+0
| | | | | | | | | | versal_pm_request() and invoke_smc() are almost the same. Only one difference is that versal_pm_request is adding PM_SIP_SVC offset to api_id. The patch is moving platform implementation to firmware driver code for synchronization. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
* arm64: zynqmp: Use mailbox driver for PMUFW config loadingMichal Simek2019-10-081-2/+0
| | | | | | | | With new mailbox driver PMUFW configuration object can be loaded via the same interface and there is no need to have pmu_ipc.c completely. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
* arm64: zynqmp: remove old fw version functionIbai Erkiaga2019-10-081-1/+0
| | | | | | | Removes the old function to get the firmware version. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* firmware: zynqmp: create firmware headerIbai Erkiaga2019-10-081-25/+0
| | | | | | | | | New firmware header to place firmware specific macro and function declarations. The patch also moves the macros defining PM operations as well as some helper macros. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Cleanup PM SMC macro compositionMichal Simek2019-10-081-2/+11
| | | | | | | | Cleanup PM ID handling by using enum values. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* mailbox: zynqmp: ipi mailbox driverIbai Erkiaga2019-10-081-0/+5
| | | | | | | | | ZynqMP mailbox driver implementing IPI communication with PMU. This would allow U-Boot SPL to communicate with PMUFW to request privileged operations. Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: spl: install a PMU firmware config object at runtimeLuca Ceresoli2019-07-301-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optionally allow U-Boot to load a configuration object into the Power Management Unit (PMU) firmware on Xilinx ZynqMP. The configuration object is required by the PMU FW to enable most SoC peripherals. So far the only way to boot using U-Boot SPL was to hard-code the configuration object in the PMU firmware. Allow a different boot process, where the PMU FW is equal for any ZynqMP chip and its configuration is passed at runtime by U-Boot SPL. All the code for Inter-processor communication with the PMU is isolated in a new file (pmu_ipc.c). The code is inspired by the same feature as implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted Firmware: * https://github.com/Xilinx/embeddedsw/blob/fb647e6b4c00f5154eba52a88b948195b6f1dc2b/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c#L295 * https://github.com/ARM-software/arm-trusted-firmware/blob/c48d02bade88b07fa7f43aa44e5217f68e5d047f/plat/xilinx/zynqmp/pm_service/pm_api_sys.c#L357 SPL logs on the console before loading the configuration object: U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200) Loading PMUFW cfg obj (2008 bytes) EL Level: EL3 ... Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Remove addresses for i2c controllersMichal Simek2019-02-141-3/+0
| | | | | | | | All platforms have been converted to DM that's why there is no reason to keep addresses in headers. They are all read from DT now. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>
* arm64: zynqmp: Remove unused GEM addressesMichal Simek2019-01-241-5/+0
| | | | | | | With DM in place there is no need to have GEM addresses in headers. None is using them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* arm64: zynqmp: Move SoC sources to mach-zynqmpMichal Simek2019-01-245-0/+282
Similar changes was done for Zynq in past and this patch just follow this pattern to separate cpu code from SoC code. Move arch/arm/cpu/armv8/zynqmp/* -> arch/arm/mach-zynqmp/* And also fix references to these files. Based on "ARM: zynq: move SoC sources to mach-zynq" (sha1: 0107f2403669f764ab726d0d404e35bb9447bbcc) Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit (git 2.34.1) at 2025-09-02 23:28:38 +0000