u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

	Commit message (Expand)	Author	Age	Files	Lines
*	common: Drop linux/bitops.h from common header	Simon Glass	2020-05-18	1	-0/+1
*	common: Drop linux/delay.h from common header	Simon Glass	2020-05-18	1	-0/+1
*	common: Drop log.h from common header	Simon Glass	2020-05-18	1	-0/+1
*	common: Drop init.h from common header	Simon Glass	2020-05-18	1	-0/+1
*	common: Drop net.h from common header	Simon Glass	2020-05-18	1	-0/+1
*	i2c: t210: Add VI_I2C clock source support	Tom Warren	2020-04-02	1	-4/+4
*	t210: do not enable PLLE and UPHY PLL HW PWRSEQ	JC Kuo	2020-04-02	1	-19/+0
*	ARM: tegra: Remove disp1 clock initialization on Tegra210	Thierry Reding	2019-06-05	1	-1/+0
*	ARM: tegra: Fix mux type for disp1 and disp2 clocks on Tegra210	Thierry Reding	2019-06-05	1	-5/+5
*	SPDX: Convert all of our single license tags to Linux Kernel style	Tom Rini	2018-05-07	1	-2/+1
*	ARM: tegra: add APIs the clock uclass driver will need	Stephen Warren	2016-09-27	1	-16/+48
*	ARM: tegra: add peripheral clock init table	Stephen Warren	2016-09-27	1	-0/+23
*	ARM: tegra210: set PLLE_PTS bit when enabling PLLE	Stephen Warren	2016-03-29	1	-0/+2
*	ARM: tegra210: implement PLLE init procedure from TRM	Stephen Warren	2015-11-12	1	-47/+132
*	ARM: tegra: clk_m is the architected timer source clock	Thierry Reding	2015-09-16	1	-6/+4
*	ARM: tegra: Implement clk_m	Thierry Reding	2015-09-16	1	-0/+11
*	tegra: Correct logic for reading pll_misc in clock_start_pll()	Simon Glass	2015-08-13	1	-0/+7
*	Tegra: PLL: use per-SoC pllinfo table instead of PLL_DIVM/N/P, etc.	Tom Warren	2015-08-05	1	-1/+30
*	Tegra: clocks: Add 38.4MHz OSC support for T210 use	Tom Warren	2015-08-05	1	-2/+6
*	ARM: Tegra210: Add SoC code/include files for T210	Tom Warren	2015-07-28	1	-0/+1091