Commit message (Expand) | Author | Age | Files | Lines | |
---|---|---|---|---|---|
* | ARM: socfpga: Reorder Arria10 SPL | Marek Vasut | 2018-08-24 | 1 | -8/+0 |
* | ARM: socfpga: Assure correct CPACR configuration | Marek Vasut | 2018-07-25 | 1 | -1/+3 |
* | arm: socfpga: Fix: Compile MCR instruction on ARM 32-bit only | Ley Foon Tan | 2018-07-12 | 1 | -0/+2 |
* | ARM: socfpga: Assure correct ACTLR configuration | Marek Vasut | 2018-07-12 | 1 | -1/+12 |
* | ARM: socfpga: Adding SoCFPGA info for both SPL and U-Boot | Tien Fong Chee | 2018-05-18 | 1 | -0/+4 |
* | ARM: socfpga: Adding clock frequency info for U-Boot | Tien Fong Chee | 2018-05-18 | 1 | -0/+7 |
* | ARM: socfpga: Add DRAM bank size initialization function | Tien Fong Chee | 2018-05-18 | 1 | -0/+7 |
* | SPDX: Convert all of our single license tags to Linux Kernel style | Tom Rini | 2018-05-07 | 1 | -2/+1 |
* | arm: socfpga: Introduce common board code | Marek Vasut | 2015-12-20 | 1 | -0/+64 |